avutil/mips: Avoid instruction exception caused by gssqc1/gslqc1.
authorShiyou Yin <yinshiyou-hf@loongson.cn>
Wed, 31 Jul 2019 01:30:01 +0000 (09:30 +0800)
committerReimar Döffinger <Reimar.Doeffinger@gmx.de>
Fri, 2 Aug 2019 17:01:51 +0000 (19:01 +0200)
Ensure the address accesed by gssqc1/gslqc1 are 16-byte aligned.


No differences found