22 months agoconfigure: Don't try to detect clang by $CC
Anton Mitrofanov [Mon, 22 May 2017 20:59:32 +0000 (23:59 +0300)]
configure: Don't try to detect clang by $CC

Only check if option -Werror=unknown-warning-option is supported before adding it

22 months agocheckasm: Use the right variable in a loop condition
Martin Storsjö [Mon, 22 May 2017 10:10:46 +0000 (13:10 +0300)]
checkasm: Use the right variable in a loop condition

Prior to this, this loop hasn't run at all. The condition has been
the same since it was introduced in 5b0cb86f.

This issue was pointed out by a clang warning.

22 months agox86: Fix linking with 8-bit depth shared libx264
Anton Mitrofanov [Mon, 22 May 2017 19:02:34 +0000 (22:02 +0300)]
x86: Fix linking with 8-bit depth shared libx264

22 months agox86: Only enable AVX-512 in 8-bit mode
Henrik Gramner [Sun, 14 May 2017 22:18:36 +0000 (00:18 +0200)]
x86: Only enable AVX-512 in 8-bit mode

22 months agox86: AVX-512 cabac_block_residual
Henrik Gramner [Thu, 11 May 2017 22:43:43 +0000 (00:43 +0200)]
x86: AVX-512 cabac_block_residual

22 months agox86: AVX-512 pixel_sad_x3 and pixel_sad_x4
Henrik Gramner [Wed, 10 May 2017 16:36:59 +0000 (18:36 +0200)]
x86: AVX-512 pixel_sad_x3 and pixel_sad_x4

Covers all variants: 4x4, 4x8, 8x4, 8x8, 8x16, 16x8, and 16x16.

22 months agox86: AVX-512 pixel_sad
Henrik Gramner [Sun, 7 May 2017 21:35:49 +0000 (23:35 +0200)]
x86: AVX-512 pixel_sad

Covers all variants: 4x4, 4x8, 4x16, 8x4, 8x8, 8x16, 16x8, and 16x16.

22 months agox86: AVX-512 decimate_score
Henrik Gramner [Thu, 4 May 2017 19:53:28 +0000 (21:53 +0200)]
x86: AVX-512 decimate_score

Also drop the MMX versions and improve the SSE2, SSSE3 and AVX2 versions.

22 months agox86: AVX-512 pixel_var2_8x8 and 8x16
Henrik Gramner [Mon, 1 May 2017 12:55:45 +0000 (14:55 +0200)]
x86: AVX-512 pixel_var2_8x8 and 8x16

22 months agoRework pixel_var2
Henrik Gramner [Mon, 1 May 2017 12:54:32 +0000 (14:54 +0200)]
Rework pixel_var2

The functions are only ever called with pointers to fenc and fdec and the
strides are always constant so there's no point in having them as parameters.

Cover both the U and V planes in a single function call. This is more
efficient with SIMD, especially with the wider vectors provided by AVX2 and
AVX-512, even when accounting for losing the possibility of early termination.

Drop the MMX and XOP implementations, update the rest of the x86 assembly
to match the new behavior. Also enable high bit-depth in the AVX2 version.

Comment out the ARM, AARCH64, and MIPS MSA assembly for now.

22 months agox86: AVX-512 pixel_var_8x8, 8x16, and 16x16
Henrik Gramner [Sat, 29 Apr 2017 12:26:40 +0000 (14:26 +0200)]
x86: AVX-512 pixel_var_8x8, 8x16, and 16x16

Make the SSE2, AVX, and AVX2 versions a bit faster.

Drop the MMX and XOP versions.

22 months agox86: AVX-512 pixel_sa8d_8x8
Henrik Gramner [Fri, 28 Apr 2017 19:35:25 +0000 (21:35 +0200)]
x86: AVX-512 pixel_sa8d_8x8

22 months agox86: AVX-512 pixel_satd
Henrik Gramner [Thu, 13 Apr 2017 21:56:04 +0000 (23:56 +0200)]
x86: AVX-512 pixel_satd

Covers all variants: 4x4, 4x8, 4x16, 8x4, 8x8, 8x16, 16x8, and 16x16.

22 months agox86: AVX-512 deblock_strength
Henrik Gramner [Wed, 19 Apr 2017 14:39:48 +0000 (16:39 +0200)]
x86: AVX-512 deblock_strength

Also drop the MMX version and make some slight improvements to the SSE2,
SSSE3, AVX, and AVX2 versions.

22 months agox86: AVX-512 plane_copy_deinterleave_v210
Henrik Gramner [Wed, 12 Apr 2017 14:21:09 +0000 (16:21 +0200)]
x86: AVX-512 plane_copy_deinterleave_v210

22 months agox86: AVX-512 memzero_aligned
Henrik Gramner [Sun, 9 Apr 2017 18:34:28 +0000 (20:34 +0200)]
x86: AVX-512 memzero_aligned

Reorder some elements in the x264_t.mb.pic struct to reduce the amount
of padding required.

Also drop the MMX implementation in favor of SSE.

22 months agox86: AVX and AVX-512 memcpy_aligned
Henrik Gramner [Fri, 7 Apr 2017 19:34:40 +0000 (21:34 +0200)]
x86: AVX and AVX-512 memcpy_aligned

Reorder some elements in the x264_mb_analysis_list_t struct to reduce the
amount of padding required.

Also drop the MMX implementation in favor of SSE.

22 months agox86: AVX-512 dequant_8x8_flat16
Henrik Gramner [Thu, 6 Apr 2017 14:06:34 +0000 (16:06 +0200)]
x86: AVX-512 dequant_8x8_flat16

22 months agox86: AVX-512 dequant_8x8
Henrik Gramner [Tue, 4 Apr 2017 18:54:12 +0000 (20:54 +0200)]
x86: AVX-512 dequant_8x8

22 months agox86: AVX-512 dequant_4x4
Henrik Gramner [Tue, 4 Apr 2017 18:01:26 +0000 (20:01 +0200)]
x86: AVX-512 dequant_4x4

22 months agox86: AVX-512 mbtree_propagate_cost
Henrik Gramner [Tue, 28 Mar 2017 20:59:56 +0000 (22:59 +0200)]
x86: AVX-512 mbtree_propagate_cost

Also make the AVX and AVX2 implementations slightly faster.

22 months agox86: AVX-512 coeff_last
Henrik Gramner [Mon, 27 Mar 2017 16:19:53 +0000 (18:19 +0200)]
x86: AVX-512 coeff_last

22 months agox86: AVX-512 zigzag_interleave_8x8_cavlc
Henrik Gramner [Sun, 26 Mar 2017 16:29:37 +0000 (18:29 +0200)]
x86: AVX-512 zigzag_interleave_8x8_cavlc

22 months agox86: AVX-512 zigzag_scan_8x8_field
Henrik Gramner [Sun, 26 Mar 2017 09:34:18 +0000 (11:34 +0200)]
x86: AVX-512 zigzag_scan_8x8_field

22 months agox86: AVX-512 zigzag_scan_4x4_field
Henrik Gramner [Sat, 25 Mar 2017 21:13:22 +0000 (22:13 +0100)]
x86: AVX-512 zigzag_scan_4x4_field

22 months agox86: AVX-512 zigzag_scan_8x8_frame
Henrik Gramner [Sat, 25 Mar 2017 18:14:28 +0000 (19:14 +0100)]
x86: AVX-512 zigzag_scan_8x8_frame

The vperm* instructions ignores unused bits, so we can pack the permutation
indices together to save cache and just use a shift to get the right values.

22 months agox86: AVX-512 zigzag_scan_4x4_frame
Henrik Gramner [Sat, 25 Mar 2017 18:14:22 +0000 (19:14 +0100)]
x86: AVX-512 zigzag_scan_4x4_frame

22 months agocheckasm: x86: More accurate ymm/zmm measurements
Henrik Gramner [Thu, 11 May 2017 22:03:10 +0000 (00:03 +0200)]
checkasm: x86: More accurate ymm/zmm measurements

YMM and ZMM registers on x86 are turned off to save power when they haven't
been used for some period of time. When they are used there will be a
"warmup" period during which performance will be reduced and inconsistent
which is problematic when trying to benchmark individual functions.

Periodically issue "dummy" instructions that uses those registers to
prevent them from being powered down. The end result is more consitent
benchmark results.

22 months agox86: AVX-512 support
Henrik Gramner [Sat, 25 Mar 2017 09:16:09 +0000 (10:16 +0100)]
x86: AVX-512 support

AVX-512 consists of a plethora of different extensions, but in order to keep
things a bit more manageable we group together the following extensions
under a single baseline cpu flag which should cover SKL-X and future CPUs:
 * AVX-512 Foundation (F)
 * AVX-512 Conflict Detection Instructions (CD)
 * AVX-512 Byte and Word Instructions (BW)
 * AVX-512 Doubleword and Quadword Instructions (DQ)
 * AVX-512 Vector Length Extensions (VL)

On x86-64 AVX-512 provides 16 additional vector registers, prefer using
those over existing ones since it allows us to avoid using `vzeroupper`
unless more than 16 vector registers are required. They also happen to
be volatile on Windows which means that we don't need to save and restore
existing xmm register contents unless more than 22 vector registers are

Also take the opportunity to drop X264_CPU_CMOV and X264_CPU_SLOW_CTZ while
we're breaking API by messing with the cpu flags since they weren't really
used for anything.

Big thanks to Intel for their support.

22 months agox86: Change assembler from yasm to nasm
Henrik Gramner [Sat, 18 Mar 2017 17:50:36 +0000 (18:50 +0100)]
x86: Change assembler from yasm to nasm

This is required to support AVX-512.

Drop `-Worphan-labels` from ASFLAGS since it's enabled by default in nasm.

Also change alignmode from `k8` to `p6` since it's more similar to `amdnop`
in yasm, e.g. use long nops without excessive prefixes.

22 months agox86: Add some additional cpuflag relations
Henrik Gramner [Sat, 6 May 2017 10:26:56 +0000 (12:26 +0200)]
x86: Add some additional cpuflag relations

Simplifies writing assembly code that depends on available instructions.

LZCNT implies SSE2
BMI1 implies AVX+LZCNT
AVX2 implies BMI2

Skip printing LZCNT under CPU capabilities when BMI1 or BMI2 is available,
and don't print FMA4 when FMA3 is available.

22 months agox86: Faster SSE2 pixel_sad_16x16 and 16x8
Henrik Gramner [Fri, 14 Apr 2017 14:16:49 +0000 (16:16 +0200)]
x86: Faster SSE2 pixel_sad_16x16 and 16x8

Also make the order of fenc/fdec arguments a bit more consistent.

22 months agomsvs/icl: Improve target host detection
Anton Mitrofanov [Sun, 14 May 2017 21:40:52 +0000 (00:40 +0300)]
msvs/icl: Improve target host detection

22 months agoppc: Optimize add8x8_idct_dc
Alexandra Hájková [Sat, 13 May 2017 17:14:52 +0000 (17:14 +0000)]
ppc: Optimize add8x8_idct_dc

Increases speedup compared to C from 2x to 6x.

22 months agoanalyse: Faster min/max MV clipping
Henrik Gramner [Sun, 19 Feb 2017 09:33:16 +0000 (10:33 +0100)]
analyse: Faster min/max MV clipping

Values only needs to be clipped in one direction.

22 months agoslicetype_mb_cost: Clip MVs based on MV range
Henrik Gramner [Thu, 16 Feb 2017 19:04:10 +0000 (20:04 +0100)]
slicetype_mb_cost: Clip MVs based on MV range

Improves cost calculations, especially when a short MV range is used.

22 months agoSupport YUYV and UYVY packed 4:2:2 raw input
Henrik Gramner [Sun, 29 Jan 2017 20:38:43 +0000 (21:38 +0100)]
Support YUYV and UYVY packed 4:2:2 raw input

Packed YUV is arguably more common than planar YUV when dealing with raw
4:2:2 content.

We can utilize the existing plane_copy_deinterleave() functions with some
additional minor constraints (we cannot assume any particular alignment
or overread the input buffer).

Enables assembly optimizations on x86.

22 months agox86: Utilize 3-arg instructions in AVX deblock
Henrik Gramner [Thu, 20 Apr 2017 19:58:23 +0000 (21:58 +0200)]
x86: Utilize 3-arg instructions in AVX deblock

Avoids some redundant register-register moves.

22 months agoconfigure: Support targeting ARM with MSVC tools
Martin Storsjö [Fri, 24 Mar 2017 09:33:46 +0000 (11:33 +0200)]
configure: Support targeting ARM with MSVC tools

Set up the right gas-preprocessor as assembler frontend in these cases,
using armasm as actual assembler.

Don't try to add the -mcpu -mfpu options in this case.

Check whether the compiler actually supports inline assembly.

Check for the ARMv7 features in a different way for the MSVC compiler.

22 months agoconfigure: Check for -lshell32 before forcibly adding it into LDFLAGSCLI
Martin Storsjö [Fri, 24 Mar 2017 09:33:45 +0000 (11:33 +0200)]
configure: Check for -lshell32 before forcibly adding it into LDFLAGSCLI

When targeting the Windows Phone API subset, there is no shell32.lib.

When targeting Windows Phone/RT, the CLI itself won't be built, but
LDFLAGSCLI are included in all later cases of cc_check within configure.
Therefore only add -lshell32 there if it actually is usable.

22 months agoarm: Always unconditionally declare .arch armv7-a
Martin Storsjö [Thu, 4 May 2017 19:00:51 +0000 (22:00 +0300)]
arm: Always unconditionally declare .arch armv7-a

We already unconditionally declare .fpu neon and try to build all the
neon codepaths (but only execute them conditionally based on a runtime

This fixes builds targeting armv6, where the rbit instruction isn't
available. This instruction is only used within a neon function in
any case, so there's little point in emulating it.

22 months agoarm: Use .section .rodata for non-elf, non-mach platforms as well
Martin Storsjö [Fri, 24 Mar 2017 09:33:44 +0000 (11:33 +0200)]
arm: Use .section .rodata for non-elf, non-mach platforms as well

If targeting windows with armasm, gas-preprocessor can rewrite the
.section .rodata into the right construct for that platform.

22 months agogas-preprocessor: Support conversion of additional arm instructions into thumb
Martin Storsjö [Fri, 24 Mar 2017 09:33:41 +0000 (11:33 +0200)]
gas-preprocessor: Support conversion of additional arm instructions into thumb

Convert muls into mul+cmp.

Convert "and r0, sp, #xx" into "mov r0, sp", "and r0, r0, #xx".

Convert ldr with a too large shift into add+ldr. This only works in the
special case when the base register is the same as the target for the ldr.

22 months agoarm: Explicitly declare using the .text segment in the function macro
Martin Storsjö [Fri, 24 Mar 2017 09:33:40 +0000 (11:33 +0200)]
arm: Explicitly declare using the .text segment in the function macro

This fixes one issue in building with MS armasm via gas-preprocessor.
Without the .text segment specification, the object files assembled
fine, but linking failed. (armasm source files don't get the text/code
segment implied automatically if nothing is specified.)

22 months agoosdep: Use the EXPAND macro on other cases of ALIGNED_ARRAY_EMU
Martin Storsjö [Fri, 24 Mar 2017 09:33:39 +0000 (11:33 +0200)]
osdep: Use the EXPAND macro on other cases of ALIGNED_ARRAY_EMU

EXPAND is already used on the other cases where ALIGNED_ARRAY_EMU
is used on all platforms (originally needed for ICL, later also
required by MSVC); apply the same change (originally from 21ba91ae)
for the cases that only are used on ARM.

This fixes use of ALIGNED_ARRAY_16 with MSVC when targeting ARM.

22 months agoUpdate to the latest version of gas-preprocessor.pl
Martin Storsjö [Fri, 24 Mar 2017 09:33:38 +0000 (11:33 +0200)]
Update to the latest version of gas-preprocessor.pl

From http://git.libav.org/?p=gas-preprocessor.git

This update contains changes from myself only.

22 months agoarm: Skip using gas-preprocessor for iOS on arm as well
Martin Storsjö [Fri, 24 Mar 2017 09:33:37 +0000 (11:33 +0200)]
arm: Skip using gas-preprocessor for iOS on arm as well

The few constructs that differ can easily be handled within the
source itself - tested to be working since at least Xcode 6.

22 months agoarm: Use const macros in arm assembly where applicable
Martin Storsjö [Fri, 24 Mar 2017 09:33:36 +0000 (11:33 +0200)]
arm: Use const macros in arm assembly where applicable

This unifies the source code style, and allows building the code
with clang without gas-preprocessor.

22 months agoarm: Use commas between all macro arguments in arm assembly
Martin Storsjö [Fri, 24 Mar 2017 09:33:35 +0000 (11:33 +0200)]
arm: Use commas between all macro arguments in arm assembly

The clang built-in assembler requires proper commas between all macro
arguments. As long as gas-preprocessor is used when building with clang,
this isn't an issue.

22 months agoaarch64: Skip invoking gas-preprocessor for iOS
Martin Storsjö [Fri, 24 Mar 2017 09:33:34 +0000 (11:33 +0200)]
aarch64: Skip invoking gas-preprocessor for iOS

Clang can handle all the constructs used there these days, working
since Xcode 6 at least.

22 months agoaarch64: Use the const macro in the aarch64 checkasm assembly source
Martin Storsjö [Fri, 24 Mar 2017 09:33:33 +0000 (11:33 +0200)]
aarch64: Use the const macro in the aarch64 checkasm assembly source

This fixes building the source with clang for iOS without gas-preprocessor.

22 months agoWindows: Add support for MSVC compilation with WSL
Henrik Gramner [Wed, 12 Apr 2017 21:26:32 +0000 (23:26 +0200)]
Windows: Add support for MSVC compilation with WSL

In Windows 10 version 1703 (Creators Update) WSL supports calling native
Windows binaries from the Bash shell, but it requires using full file
names including extension, e.g. `cl.exe` instead of `cl`.

We also don't have access to `cygpath`, so use a simple regex for
converting the dependencies to Unix paths that `make` can understand.

22 months agocli: Improve the --fullhelp raw demuxer input-csp listing
Henrik Gramner [Sun, 29 Jan 2017 21:58:24 +0000 (22:58 +0100)]
cli: Improve the --fullhelp raw demuxer input-csp listing

Use the same logic for indentation as the lavf demuxer.

22 months agox86inc: Remove argument from WIN64_RESTORE_XMM
Anton Mitrofanov [Sat, 20 May 2017 18:17:59 +0000 (21:17 +0300)]
x86inc: Remove argument from WIN64_RESTORE_XMM

The use of rsp was pretty much hardcoded there and probably didn't work
otherwise with stack_size > 0.

22 months agox86inc: Prefer r14/r15 over r12/r13 on x86-64
Henrik Gramner [Sat, 22 Apr 2017 18:30:35 +0000 (20:30 +0200)]
x86inc: Prefer r14/r15 over r12/r13 on x86-64

Due to a peculiarity in the ModR/M addressing encoding, the r12 and r13
registers sometimes requires an additional byte when used as a base register.

r14 and r15 doesn't have that issue, so prefer using them.

22 months agox86inc: Make REP_RET identical to RET in SSSE3+ functions
Henrik Gramner [Thu, 20 Apr 2017 17:16:51 +0000 (19:16 +0200)]
x86inc: Make REP_RET identical to RET in SSSE3+ functions

There's no point in emitting a rep prefix before ret on modern CPUs.

22 months agox86inc: Fix call with memory operands
Henrik Gramner [Wed, 29 Mar 2017 14:43:57 +0000 (16:43 +0200)]
x86inc: Fix call with memory operands

We overload the `call` instruction with a macro, but it would misbehave when
the macro argument wasn't a valid identifier. Fix it by explicitly checking
if the argument is an identifier.

22 months agoosdep: Rework alignment macros
Henrik Gramner [Sun, 29 Jan 2017 15:41:33 +0000 (16:41 +0100)]
osdep: Rework alignment macros

Drop ALIGNED_N and ALIGNED_ARRAY_N in favor of using explicit alignment.

This will allow us to increase the native alignment without unnecessarily
increasing the alignment of everything that's currently 32-byte aligned.

22 months agoMove cabac_block_residual function declarations
Vittorio Giovara [Mon, 30 Jan 2017 21:14:57 +0000 (22:14 +0100)]
Move cabac_block_residual function declarations

22 months agoRecursively delete conftest files
Vittorio Giovara [Mon, 30 Jan 2017 21:14:59 +0000 (22:14 +0100)]
Recursively delete conftest files

On OS X, one of the conftest files might be a directory named `conftest.dSYM`.

22 months agoDrop unused function declarations
Vittorio Giovara [Mon, 30 Jan 2017 21:14:56 +0000 (22:14 +0100)]
Drop unused function declarations

22 months agox86: Adjust cache64_ssse3 function suffixes
Vittorio Giovara [Fri, 27 Jan 2017 17:06:39 +0000 (18:06 +0100)]
x86: Adjust cache64_ssse3 function suffixes

Makes those function names more consistent with other similar functions.

22 months agomc: Mark a function only used within the file as static
Vittorio Giovara [Fri, 27 Jan 2017 15:21:16 +0000 (16:21 +0100)]
mc: Mark a function only used within the file as static

22 months agoppc: Drop two unused static functions
Vittorio Giovara [Fri, 27 Jan 2017 15:21:15 +0000 (16:21 +0100)]
ppc: Drop two unused static functions

22 months agocli: Verify that yuv/y4m input has at least one frame of data
Henrik Gramner [Fri, 19 May 2017 14:08:34 +0000 (16:08 +0200)]
cli: Verify that yuv/y4m input has at least one frame of data

Prevents a SIGBUS crash caused by attempting to access a memory-mapped
region beyond the end of the input file.

2 years agomips: Fix out-of-tree build
Kaustubh Raste [Fri, 14 Apr 2017 09:59:31 +0000 (15:29 +0530)]
mips: Fix out-of-tree build

Signed-off-by: Kaustubh Raste <kaustubh.raste@imgtec.com>
2 years agocheckasm: Fix load_deinterleave_chroma_fdec test
Henrik Gramner [Fri, 24 Mar 2017 23:02:11 +0000 (00:02 +0100)]
checkasm: Fix load_deinterleave_chroma_fdec test

The function only writes to parts of the destination buffer but the test
verifies the content of the entire buffer. The problem is that some earlier
IDCT functions clobbers the same part of the buffer with garbage when
benchmarked which would incorrectly cause test failures.

Fix this by explicitly zeroing the buffers beforehand.

2 years agocheckasm: Fix compilation on hardened x86-64 ELF systems
Henrik Gramner [Fri, 24 Mar 2017 21:27:42 +0000 (22:27 +0100)]
checkasm: Fix compilation on hardened x86-64 ELF systems

Normal PC-relative relocations cannot be used for resolving the address of
external symbols on systems where ASLR results in the offset being larger
than 32 bits. We are required to to go through the PLT instead.

2 years agoaarch64: Fix building checkasm for iOS
Martin Storsjö [Thu, 23 Mar 2017 13:05:38 +0000 (15:05 +0200)]
aarch64: Fix building checkasm for iOS

On iOS, symbols are prefixed - this prefix gets added by the X()

2 years agoconfigure: Always enable PIC in aarch64 assembly for apple platforms
Martin Storsjö [Thu, 23 Mar 2017 13:05:37 +0000 (15:05 +0200)]
configure: Always enable PIC in aarch64 assembly for apple platforms

This is similar to what we do for 32-bit ARM assembly as well.

Fixes linker errors such as `ld: Absolute addressing not allowed in
arm64 code but used in '_x264_cabac_encode_terminal_asm' referencing
'_x264_cabac_range_lps' for architecture arm64`.

2 years agoppc: AltiVec plane_copy_deinterleave
Alexandra Hájková [Mon, 5 Dec 2016 10:28:53 +0000 (10:28 +0000)]
ppc: AltiVec plane_copy_deinterleave

2 years agoppc: AltiVec plane_copy_deinterleave_v210
Alexandra Hájková [Mon, 2 Jan 2017 12:56:48 +0000 (12:56 +0000)]
ppc: AltiVec plane_copy_deinterleave_v210

2 years agoppc: AltiVec plane_copy_deinterleave_rgb
Alexandra Hájková [Wed, 7 Dec 2016 19:48:02 +0000 (19:48 +0000)]
ppc: AltiVec plane_copy_deinterleave_rgb

Also add some missing vector types in ppccommon.h

2 years agoppc: Adjust AltiVec function suffix
Vittorio Giovara [Thu, 19 Jan 2017 16:43:57 +0000 (17:43 +0100)]
ppc: Adjust AltiVec function suffix

Architecture should always be the last element.

2 years agoMove the x264_mdate() declaration to the appropriate header
Vittorio Giovara [Mon, 9 Jan 2017 21:28:20 +0000 (22:28 +0100)]
Move the x264_mdate() declaration to the appropriate header

2 years agoarm/aarch64: Correctly prefix integral function symbols
Vittorio Giovara [Tue, 17 Jan 2017 16:04:19 +0000 (17:04 +0100)]
arm/aarch64: Correctly prefix integral function symbols

2 years agox86: Avoid using hardcoded function symbol prefixes
Anton Mitrofanov [Fri, 13 Jan 2017 13:57:51 +0000 (14:57 +0100)]
x86: Avoid using hardcoded function symbol prefixes

2 years agox86: AVX2 high bit-depth load_deinterleave_chroma
Henrik Gramner [Wed, 18 Jan 2017 20:57:14 +0000 (21:57 +0100)]
x86: AVX2 high bit-depth load_deinterleave_chroma

load_deinterleave_chroma_fenc: 50% faster than AVX
load_deinterleave_chroma_fdec: 25% faster than AVX

2 years agox86: AVX2 load_deinterleave_chroma_fenc
Henrik Gramner [Wed, 18 Jan 2017 20:46:55 +0000 (21:46 +0100)]
x86: AVX2 load_deinterleave_chroma_fenc

20% faster than SSSE3.

2 years agox86: AVX2 plane_copy_deinterleave
Henrik Gramner [Tue, 17 Jan 2017 20:59:47 +0000 (21:59 +0100)]
x86: AVX2 plane_copy_deinterleave

50% faster than SSSE3 in 8-bit.
25% faster than AVX in high bit-depth.

Also drop the MMX versions of deinterleave functions in favor of SSE2.

2 years agox86: AVX2 plane_copy_deinterleave_rgb
Henrik Gramner [Thu, 12 Jan 2017 21:16:53 +0000 (22:16 +0100)]
x86: AVX2 plane_copy_deinterleave_rgb

Around 15% faster than SSSE3.

2 years agox86: Faster plane_copy_deinterleave_rgb_sse2
Henrik Gramner [Thu, 12 Jan 2017 20:36:28 +0000 (21:36 +0100)]
x86: Faster plane_copy_deinterleave_rgb_sse2

50% faster than the previous SSE2 function.

2 years agox86util: Reduce code size of high bit-depth AVX LOAD_DIFF
Henrik Gramner [Sun, 15 Jan 2017 13:52:29 +0000 (14:52 +0100)]
x86util: Reduce code size of high bit-depth AVX LOAD_DIFF

AVX supports unaligned memory operands which makes the SATD code a bit denser.

2 years agoBump dates to 2017
Henrik Gramner [Sun, 1 Jan 2017 18:10:10 +0000 (19:10 +0100)]
Bump dates to 2017

2 years agoppc: Fix the pre-VSX vec_vsx_st() fallback macro
Alexandra Hájková [Sat, 21 Jan 2017 12:34:49 +0000 (12:34 +0000)]
ppc: Fix the pre-VSX vec_vsx_st() fallback macro

It would previously only work correctly with 8-bit data types.

Fixes compilation with --disable-vsx.

2 years agoFix plane_copy_deinterleave_v210 on big-endian
Alexandra Hájková [Wed, 18 Jan 2017 09:13:39 +0000 (09:13 +0000)]
Fix plane_copy_deinterleave_v210 on big-endian

2 years agoppc: Avoid instantiating unused plane_copy functions
Alexandra Hájková [Wed, 21 Dec 2016 13:13:43 +0000 (13:13 +0000)]
ppc: Avoid instantiating unused plane_copy functions

Those functions are currently only used in 8-bit mode and results in
warnings in other bit depths.

2 years agoarm: Load mb_y properly in mbtree_propagate_list_internal_neon
Martin Storsjö [Mon, 26 Dec 2016 22:22:48 +0000 (00:22 +0200)]
arm: Load mb_y properly in mbtree_propagate_list_internal_neon

The previous version, attempting to load two stack parameters at once,
only would have worked if they were interpreted and loaded as 32 bit
elements, not when loading them as 16 bit elements.

2 years agoanalyse: Fix lambda table values
Anton Mitrofanov [Mon, 31 Oct 2016 11:39:52 +0000 (14:39 +0300)]
analyse: Fix lambda table values

2 years agoCosmetics
Anton Mitrofanov [Sat, 26 Nov 2016 12:30:58 +0000 (15:30 +0300)]

Also make x264_weighted_reference_duplicate() static.

2 years agoppc: AltiVec store_interleave_chroma
Alexandra Hájková [Mon, 28 Nov 2016 14:04:10 +0000 (14:04 +0000)]
ppc: AltiVec store_interleave_chroma

2 years agoppc: AltiVec plane_copy_interleave
Alexandra Hájková [Mon, 28 Nov 2016 10:51:54 +0000 (10:51 +0000)]
ppc: AltiVec plane_copy_interleave

2 years agoppc: AltiVec plane_copy_swap
Alexandra Hájková [Sat, 26 Nov 2016 20:03:34 +0000 (20:03 +0000)]
ppc: AltiVec plane_copy_swap

2 years agoppc: AltiVec zigzag_interleave_8x8_cavlc
Alexandra Hájková [Wed, 23 Nov 2016 19:53:51 +0000 (20:53 +0100)]
ppc: AltiVec zigzag_interleave_8x8_cavlc

2 years agoppc: AltiVec zigzag_scan_8x8_frame
Alexandra Hájková [Wed, 23 Nov 2016 19:53:50 +0000 (20:53 +0100)]
ppc: AltiVec zigzag_scan_8x8_frame

2 years agoppc: AltiVec sub8x8_dct_dc
Alexandra Hájková [Mon, 14 Nov 2016 14:06:06 +0000 (15:06 +0100)]
ppc: AltiVec sub8x8_dct_dc

2 years agoppc: AltiVec add8x8_idct_dc
Alexandra Hájková [Mon, 14 Nov 2016 14:06:05 +0000 (15:06 +0100)]
ppc: AltiVec add8x8_idct_dc

2 years agocheckasm: aarch64: Add filler args to make sure all parameters are passed on the...
Martin Storsjö [Wed, 16 Nov 2016 08:57:31 +0000 (10:57 +0200)]
checkasm: aarch64: Add filler args to make sure all parameters are passed on the stack

This, combined with clobbering the stack space prior to the call,
increases the chances of finding cases where 32 bit parameters
are erroneously treated as 64 bit.

2 years agocheckasm: aarch64: Clobber the stack before calling functions
Martin Storsjö [Wed, 16 Nov 2016 08:57:30 +0000 (10:57 +0200)]
checkasm: aarch64: Clobber the stack before calling functions

2 years agoppc: Use vec_vsx_ld instead of VEC_LOAD/STORE macros
Alexandra Hájková [Tue, 1 Nov 2016 22:16:17 +0000 (23:16 +0100)]
ppc: Use vec_vsx_ld instead of VEC_LOAD/STORE macros

Remove VEC_LOAD*, some of VEC_STORE* macros, some PREP* macros and

Make sure the functions do not use deprected primitives.