contrib: ffmpeg: Patch ffmpeg to build with clang without gas-preprocessor
authorMartin Storsjö <martin@martin.st>
Sat, 31 Mar 2018 19:11:35 +0000 (22:11 +0300)
committerMartin Storsjö <martin@martin.st>
Sat, 31 Mar 2018 19:24:04 +0000 (22:24 +0300)
Vanilla clang supports altmacro since clang 5.0, and thus doesn't
require gas-preprocessor for building the arm assembly any longer.

However, the built-in assembler doesn't support a few of the fringe
features used in the assembly.

Patches 1-2 are needed for both libav and ffmpeg, while 3-5 are
needed only on ffmpeg. All patches are already in the latest
corresponding upstream master versions.

Patches 1-2 and 4-5 are only needed on Xcode 9.3, while patch 3
is needed with clang >= 5.0 for any target.

contrib/src/ffmpeg/0001-arm-vc1dsp-Add-commas-between-macro-arguments.patch [new file with mode: 0644]
contrib/src/ffmpeg/0002-arm-Produce-.const_data-instead-of-.section-.rodata-.patch [new file with mode: 0644]
contrib/src/ffmpeg/0003-arm-swscale-Only-compile-the-rgb2yuv-asm-if-.dn-alia.patch [new file with mode: 0644]
contrib/src/ffmpeg/0004-arm-hevcdsp-Avoid-using-macro-expansion-counters.patch [new file with mode: 0644]
contrib/src/ffmpeg/0005-arm-hevcdsp-Add-commas-between-macro-arguments.patch [new file with mode: 0644]
contrib/src/ffmpeg/rules.mak

diff --git a/contrib/src/ffmpeg/0001-arm-vc1dsp-Add-commas-between-macro-arguments.patch b/contrib/src/ffmpeg/0001-arm-vc1dsp-Add-commas-between-macro-arguments.patch
new file mode 100644 (file)
index 0000000..b0ded07
--- /dev/null
@@ -0,0 +1,306 @@
+From 1d5226a915ed98fcc3e0c1edd22908743f5a356e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
+Date: Fri, 30 Mar 2018 12:31:09 +0300
+Subject: [PATCH 1/5] arm: vc1dsp: Add commas between macro arguments
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When targeting darwin, clang requires commas between arguments,
+while the no-comma form is allowed for other targets.
+
+Since Xcode 9.3, the bundled clang supports altmacro and doesn't
+require using gas-preprocessor any longer.
+
+Signed-off-by: Martin Storsjö <martin@martin.st>
+---
+ libavcodec/arm/vc1dsp_neon.S | 94 ++++++++++++++++++++++----------------------
+ 1 file changed, 47 insertions(+), 47 deletions(-)
+
+diff --git a/libavcodec/arm/vc1dsp_neon.S b/libavcodec/arm/vc1dsp_neon.S
+index de4d589..93f043b 100644
+--- a/libavcodec/arm/vc1dsp_neon.S
++++ b/libavcodec/arm/vc1dsp_neon.S
+@@ -410,13 +410,13 @@ function ff_vc1_inv_trans_8x8_neon, export=1
+         @   src[48] q14
+         @   src[56] q15
+-        vc1_inv_trans_8x8_helper add=4 add1beforeshift=0 rshift=3
++        vc1_inv_trans_8x8_helper add=4, add1beforeshift=0, rshift=3
+         @ Transpose result matrix of 8x8
+         swap4           d17, d19, d21, d23, d24, d26, d28, d30
+         transpose16_4x4 q8,  q9,  q10, q11, q12, q13, q14, q15
+-        vc1_inv_trans_8x8_helper add=64 add1beforeshift=1 rshift=7
++        vc1_inv_trans_8x8_helper add=64, add1beforeshift=1, rshift=7
+         vst1.64         {q8-q9},   [r0,:128]!
+         vst1.64         {q10-q11}, [r0,:128]!
+@@ -431,7 +431,7 @@ function ff_vc1_inv_trans_8x4_neon, export=1
+         vld1.64         {q0-q1}, [r2,:128]!     @ load 8 * 4 * 2 = 64 bytes / 16 bytes per quad = 4 quad registers
+         vld1.64         {q2-q3}, [r2,:128]
+-        transpose16     q0 q1 q2 q3             @ transpose rows to columns
++        transpose16     q0, q1, q2, q3          @ transpose rows to columns
+         @ At this point:
+         @   src[0]   d0
+@@ -443,7 +443,7 @@ function ff_vc1_inv_trans_8x4_neon, export=1
+         @   src[6]   d5
+         @   src[7]   d7
+-        vc1_inv_trans_8x4_helper    add=4 add1beforeshift=0 rshift=3
++        vc1_inv_trans_8x4_helper    add=4, add1beforeshift=0, rshift=3
+         @ Move output to more standardized registers
+         vmov        d0, d16
+@@ -465,7 +465,7 @@ function ff_vc1_inv_trans_8x4_neon, export=1
+         @   dst[6]   d5
+         @   dst[7]   d7
+-        transpose16     q0 q1 q2 q3   @ turn columns into rows
++        transpose16     q0, q1, q2, q3   @ turn columns into rows
+         @ At this point:
+         @   row[0] q0
+@@ -473,7 +473,7 @@ function ff_vc1_inv_trans_8x4_neon, export=1
+         @   row[2] q2
+         @   row[3] q3
+-        vc1_inv_trans_4x8_helper    add=64 rshift=7
++        vc1_inv_trans_4x8_helper    add=64, rshift=7
+         @ At this point:
+         @   line[0].l   d0
+@@ -523,7 +523,7 @@ function ff_vc1_inv_trans_4x8_neon, export=1
+         vld4.16         {d1[2], d3[2], d5[2], d7[2]}, [r2,:64], r12
+         vld4.16         {d1[3], d3[3], d5[3], d7[3]}, [r2,:64]
+-        vc1_inv_trans_4x8_helper    add=4 rshift=3
++        vc1_inv_trans_4x8_helper    add=4, rshift=3
+         @ At this point:
+         @   dst[0] = q0
+@@ -531,9 +531,9 @@ function ff_vc1_inv_trans_4x8_neon, export=1
+         @   dst[2] = q2
+         @   dst[3] = q3
+-        transpose16     q0 q1 q2 q3     @ Transpose rows (registers) into columns
++        transpose16     q0, q1, q2, q3  @ Transpose rows (registers) into columns
+-        vc1_inv_trans_8x4_helper    add=64 add1beforeshift=1 rshift=7
++        vc1_inv_trans_8x4_helper    add=64, add1beforeshift=1, rshift=7
+         vld1.32         {d28[]},  [r0,:32], r1  @ read dest
+         vld1.32         {d28[1]}, [r0,:32], r1
+@@ -611,7 +611,7 @@ function ff_vc1_inv_trans_4x4_neon, export=1
+         @   src[2] = d1
+         @   src[3] = d3
+-        vc1_inv_trans_4x4_helper add=4 rshift=3      @ compute t1, t2, t3, t4 and combine them into dst[0-3]
++        vc1_inv_trans_4x4_helper add=4, rshift=3     @ compute t1, t2, t3, t4 and combine them into dst[0-3]
+         @ At this point:
+         @   dst[0] = d0
+@@ -619,7 +619,7 @@ function ff_vc1_inv_trans_4x4_neon, export=1
+         @   dst[2] = d1
+         @   dst[3] = d2
+-        transpose16     d0 d3 d1 d2     @ Transpose rows (registers) into columns
++        transpose16     d0, d3, d1, d2  @ Transpose rows (registers) into columns
+         @ At this point:
+         @   src[0]  = d0
+@@ -635,7 +635,7 @@ function ff_vc1_inv_trans_4x4_neon, export=1
+         @   src[16] = d1
+         @   src[24] = d3
+-        vc1_inv_trans_4x4_helper add=64 rshift=7              @ compute t1, t2, t3, t4 and combine them into dst[0-3]
++        vc1_inv_trans_4x4_helper add=64, rshift=7             @ compute t1, t2, t3, t4 and combine them into dst[0-3]
+         @ At this point:
+         @   line[0] = d0
+@@ -665,26 +665,26 @@ endfunc
+ @ The absolute value of multiplication constants from vc1_mspel_filter and vc1_mspel_{ver,hor}_filter_16bits.
+ @ The sign is embedded in the code below that carries out the multiplication (mspel_filter{,.16}).
+-#define MSPEL_MODE_1_MUL_CONSTANTS  4 53 18 3
+-#define MSPEL_MODE_2_MUL_CONSTANTS  1 9  9  1
+-#define MSPEL_MODE_3_MUL_CONSTANTS  3 18 53 4
++#define MSPEL_MODE_1_MUL_CONSTANTS  4, 53, 18, 3
++#define MSPEL_MODE_2_MUL_CONSTANTS  1, 9,  9,  1
++#define MSPEL_MODE_3_MUL_CONSTANTS  3, 18, 53, 4
+ @ These constants are from reading the source code of vc1_mspel_mc and determining the value that
+ @ is added to `rnd` to result in the variable `r`, and the value of the variable `shift`.
+-#define MSPEL_MODES_11_ADDSHIFT_CONSTANTS   15 5
+-#define MSPEL_MODES_12_ADDSHIFT_CONSTANTS   3  3
+-#define MSPEL_MODES_13_ADDSHIFT_CONSTANTS   15 5
++#define MSPEL_MODES_11_ADDSHIFT_CONSTANTS   15, 5
++#define MSPEL_MODES_12_ADDSHIFT_CONSTANTS   3,  3
++#define MSPEL_MODES_13_ADDSHIFT_CONSTANTS   15, 5
+ #define MSPEL_MODES_21_ADDSHIFT_CONSTANTS   MSPEL_MODES_12_ADDSHIFT_CONSTANTS
+-#define MSPEL_MODES_22_ADDSHIFT_CONSTANTS   0  1
+-#define MSPEL_MODES_23_ADDSHIFT_CONSTANTS   3  3
++#define MSPEL_MODES_22_ADDSHIFT_CONSTANTS   0,  1
++#define MSPEL_MODES_23_ADDSHIFT_CONSTANTS   3,  3
+ #define MSPEL_MODES_31_ADDSHIFT_CONSTANTS   MSPEL_MODES_13_ADDSHIFT_CONSTANTS
+ #define MSPEL_MODES_32_ADDSHIFT_CONSTANTS   MSPEL_MODES_23_ADDSHIFT_CONSTANTS
+-#define MSPEL_MODES_33_ADDSHIFT_CONSTANTS   15 5
++#define MSPEL_MODES_33_ADDSHIFT_CONSTANTS   15, 5
+ @ The addition and shift constants from vc1_mspel_filter.
+-#define MSPEL_MODE_1_ADDSHIFT_CONSTANTS     32 6
+-#define MSPEL_MODE_2_ADDSHIFT_CONSTANTS     8  4
+-#define MSPEL_MODE_3_ADDSHIFT_CONSTANTS     32 6
++#define MSPEL_MODE_1_ADDSHIFT_CONSTANTS     32, 6
++#define MSPEL_MODE_2_ADDSHIFT_CONSTANTS     8,  4
++#define MSPEL_MODE_3_ADDSHIFT_CONSTANTS     32, 6
+ @ Setup constants in registers for a subsequent use of mspel_filter{,.16}.
+ .macro mspel_constants typesize reg_a reg_b reg_c reg_d filter_a filter_b filter_c filter_d reg_add filter_add_register
+@@ -818,7 +818,7 @@ T       mov             sp,  r4
+         sub             r1,  r1,  r2            @ r1 = &src[-stride]      @ slide back
+         @ Do vertical filtering from src into tmp
+-        mspel_constants i8 d28 d29 d30 d31 \filter_v_a \filter_v_b \filter_v_c \filter_v_d q13 r3
++        mspel_constants i8, d28, d29, d30, d31, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, q13, r3
+         vld1.64         {d0,d1}, [r1], r2
+         vld1.64         {d2,d3}, [r1], r2
+@@ -828,23 +828,23 @@ T       mov             sp,  r4
+         subs            r12,  r12,  #4
+         vld1.64         {d6,d7}, [r1], r2
+-        mspel_filter    q11 q11 d0 d2 d4 d6 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
+-        mspel_filter    q12 q12 d1 d3 d5 d7 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
++        mspel_filter    q11, q11, d0, d2, d4, d6, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
++        mspel_filter    q12, q12, d1, d3, d5, d7, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
+         vst1.64         {q11,q12}, [r4,:128]!   @ store and increment
+         vld1.64         {d0,d1}, [r1], r2
+-        mspel_filter    q11 q11 d2 d4 d6 d0 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
+-        mspel_filter    q12 q12 d3 d5 d7 d1 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
++        mspel_filter    q11, q11, d2, d4, d6, d0, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
++        mspel_filter    q12, q12, d3, d5, d7, d1, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
+         vst1.64         {q11,q12}, [r4,:128]!   @ store and increment
+         vld1.64         {d2,d3}, [r1], r2
+-        mspel_filter    q11 q11 d4 d6 d0 d2 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
+-        mspel_filter    q12 q12 d5 d7 d1 d3 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
++        mspel_filter    q11, q11, d4, d6, d0, d2, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
++        mspel_filter    q12, q12, d5, d7, d1, d3, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
+         vst1.64         {q11,q12}, [r4,:128]!   @ store and increment
+         vld1.64         {d4,d5}, [r1], r2
+-        mspel_filter    q11 q11 d6 d0 d2 d4 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
+-        mspel_filter    q12 q12 d7 d1 d3 d5 \filter_v_a \filter_v_b \filter_v_c \filter_v_d d28 d29 d30 d31 q13 \filter_shift narrow=0
++        mspel_filter    q11, q11, d6, d0, d2, d4, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
++        mspel_filter    q12, q12, d7, d1, d3, d5, \filter_v_a, \filter_v_b, \filter_v_c, \filter_v_d, d28, d29, d30, d31, q13, \filter_shift, narrow=0
+         vst1.64         {q11,q12}, [r4,:128]!   @ store and increment
+         bne             1b
+@@ -854,7 +854,7 @@ T       mov             sp,  r4
+         mov             r4,   sp                @ r4 = tmp
+         @ Do horizontal filtering from temp to dst
+-        mspel_constants i16 d28 d29 d30 d31 \filter_h_a \filter_h_b \filter_h_c \filter_h_d q13 r3
++        mspel_constants i16, d28, d29, d30, d31, \filter_h_a, \filter_h_b, \filter_h_c, \filter_h_d, q13, r3
+ 2:
+         subs            r12,  r12,  #1
+@@ -864,7 +864,7 @@ T       mov             sp,  r4
+         vext.16         q3,   q0,   q1,  #3
+         vext.16         q1,   q0,   q1,  #1     @ do last because it writes to q1 which is read by the other vext instructions
+-        mspel_filter.16 q11 q12 d22 d23 d21 d0 d1 d2 d3 d4 d5 d6 d7 \filter_h_a \filter_h_b \filter_h_c \filter_h_d d28 d29 d30 d31 q13 7
++        mspel_filter.16 q11, q12, d22, d23, d21, d0, d1, d2, d3, d4, d5, d6, d7, \filter_h_a, \filter_h_b, \filter_h_c, \filter_h_d, d28, d29, d30, d31, q13, 7
+         vst1.64         {d21}, [r0,:64], r2     @ store and increment dst
+@@ -877,9 +877,9 @@ endfunc
+ @ Use C preprocessor and assembler macros to expand to functions for horizontal and vertical filtering.
+ #define PUT_VC1_MSPEL_MC_HV(hmode, vmode)   \
+-    put_vc1_mspel_mc_hv hmode vmode \
+-        MSPEL_MODE_ ## hmode ## _MUL_CONSTANTS \
+-        MSPEL_MODE_ ## vmode ## _MUL_CONSTANTS \
++    put_vc1_mspel_mc_hv hmode, vmode, \
++        MSPEL_MODE_ ## hmode ## _MUL_CONSTANTS, \
++        MSPEL_MODE_ ## vmode ## _MUL_CONSTANTS, \
+         MSPEL_MODES_ ## hmode ## vmode ## _ADDSHIFT_CONSTANTS
+ PUT_VC1_MSPEL_MC_HV(1, 1)
+@@ -900,7 +900,7 @@ function ff_put_vc1_mspel_mc\hmode\()0_neon, export=1
+         mov             r12,  #8                        @ loop counter
+         sub             r1,   r1,   #1                  @ slide back, using immediate
+-        mspel_constants i8 d28 d29 d30 d31 \filter_a \filter_b \filter_c \filter_d q13 r3
++        mspel_constants i8, d28, d29, d30, d31, \filter_a, \filter_b, \filter_c, \filter_d, q13, r3
+ 1:
+         subs            r12,  r12,  #1
+@@ -910,7 +910,7 @@ function ff_put_vc1_mspel_mc\hmode\()0_neon, export=1
+         vext.8          d3,   d0,   d1,  #3
+         vext.8          d1,   d0,   d1,  #1             @ do last because it writes to d1 which is read by the other vext instructions
+-        mspel_filter    q11 d21 d0 d1 d2 d3 \filter_a \filter_b \filter_c \filter_d d28 d29 d30 d31 q13 \filter_shift
++        mspel_filter    q11, d21, d0, d1, d2, d3, \filter_a, \filter_b, \filter_c, \filter_d, d28, d29, d30, d31, q13, \filter_shift
+         vst1.64         {d21}, [r0,:64], r2             @ store and increment dst
+@@ -922,7 +922,7 @@ endfunc
+ @ Use C preprocessor and assembler macros to expand to functions for horizontal only filtering.
+ #define PUT_VC1_MSPEL_MC_H_ONLY(hmode) \
+-        put_vc1_mspel_mc_h_only hmode MSPEL_MODE_ ## hmode ## _MUL_CONSTANTS MSPEL_MODE_ ## hmode ## _ADDSHIFT_CONSTANTS
++        put_vc1_mspel_mc_h_only hmode, MSPEL_MODE_ ## hmode ## _MUL_CONSTANTS, MSPEL_MODE_ ## hmode ## _ADDSHIFT_CONSTANTS
+ PUT_VC1_MSPEL_MC_H_ONLY(1)
+ PUT_VC1_MSPEL_MC_H_ONLY(2)
+@@ -937,7 +937,7 @@ function ff_put_vc1_mspel_mc0\vmode\()_neon, export=1
+         mov             r12,  #8                        @ loop counter
+         sub             r1,   r1,   r2                  @ r1 = &src[-stride]      @ slide back
+-        mspel_constants i8 d28 d29 d30 d31 \filter_a \filter_b \filter_c \filter_d q13 r3
++        mspel_constants i8, d28, d29, d30, d31, \filter_a, \filter_b, \filter_c, \filter_d, q13, r3
+         vld1.64         {d0},  [r1], r2                 @ d0 = src[-stride]
+         vld1.64         {d1},  [r1], r2                 @ d1 = src[0]
+@@ -947,19 +947,19 @@ function ff_put_vc1_mspel_mc0\vmode\()_neon, export=1
+         subs            r12,  r12,  #4
+         vld1.64         {d3},  [r1], r2                 @ d3 = src[stride * 2]
+-        mspel_filter    q11 d21 d0 d1 d2 d3 \filter_a \filter_b \filter_c \filter_d d28 d29 d30 d31 q13 \filter_shift
++        mspel_filter    q11, d21, d0, d1, d2, d3, \filter_a, \filter_b, \filter_c, \filter_d, d28, d29, d30, d31, q13, \filter_shift
+         vst1.64         {d21}, [r0,:64], r2             @ store and increment dst
+         vld1.64         {d0},  [r1], r2                 @ d0 = next line
+-        mspel_filter    q11 d21 d1 d2 d3 d0 \filter_a \filter_b \filter_c \filter_d d28 d29 d30 d31 q13 \filter_shift
++        mspel_filter    q11, d21, d1, d2, d3, d0, \filter_a, \filter_b, \filter_c, \filter_d, d28, d29, d30, d31, q13, \filter_shift
+         vst1.64         {d21}, [r0,:64], r2             @ store and increment dst
+         vld1.64         {d1},  [r1], r2                 @ d1 = next line
+-        mspel_filter    q11 d21 d2 d3 d0 d1 \filter_a \filter_b \filter_c \filter_d d28 d29 d30 d31 q13 \filter_shift
++        mspel_filter    q11, d21, d2, d3, d0, d1, \filter_a, \filter_b, \filter_c, \filter_d, d28, d29, d30, d31, q13, \filter_shift
+         vst1.64         {d21}, [r0,:64], r2             @ store and increment dst
+         vld1.64         {d2},  [r1], r2                 @ d2 = next line
+-        mspel_filter    q11 d21 d3 d0 d1 d2 \filter_a \filter_b \filter_c \filter_d d28 d29 d30 d31 q13 \filter_shift
++        mspel_filter    q11, d21, d3, d0, d1, d2, \filter_a, \filter_b, \filter_c, \filter_d, d28, d29, d30, d31, q13, \filter_shift
+         vst1.64         {d21}, [r0,:64], r2             @ store and increment dst
+         bne             1b
+@@ -970,7 +970,7 @@ endfunc
+ @ Use C preprocessor and assembler macros to expand to functions for vertical only filtering.
+ #define PUT_VC1_MSPEL_MC_V_ONLY(vmode) \
+-        put_vc1_mspel_mc_v_only vmode MSPEL_MODE_ ## vmode ## _MUL_CONSTANTS MSPEL_MODE_ ## vmode ## _ADDSHIFT_CONSTANTS
++        put_vc1_mspel_mc_v_only vmode, MSPEL_MODE_ ## vmode ## _MUL_CONSTANTS, MSPEL_MODE_ ## vmode ## _ADDSHIFT_CONSTANTS
+ PUT_VC1_MSPEL_MC_V_ONLY(1)
+ PUT_VC1_MSPEL_MC_V_ONLY(2)
+-- 
+2.7.4
+
diff --git a/contrib/src/ffmpeg/0002-arm-Produce-.const_data-instead-of-.section-.rodata-.patch b/contrib/src/ffmpeg/0002-arm-Produce-.const_data-instead-of-.section-.rodata-.patch
new file mode 100644 (file)
index 0000000..d9e2692
--- /dev/null
@@ -0,0 +1,46 @@
+From bb88d98dd80ab5bb1d41ddf635ce293d5679726b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
+Date: Fri, 30 Mar 2018 12:33:46 +0300
+Subject: [PATCH 2/5] arm: Produce .const_data instead of .section .rodata for
+ Mach-O
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This is the same combination of .section directives as used in
+aarch64/asm.S.
+
+Since Xcode 9.3, the bundled clang supports altmacro and doesn't
+require using gas-preprocessor any longer.
+
+Signed-off-by: Martin Storsjö <martin@martin.st>
+---
+ libavutil/arm/asm.S | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/libavutil/arm/asm.S b/libavutil/arm/asm.S
+index eb689a1..6744f2a 100644
+--- a/libavutil/arm/asm.S
++++ b/libavutil/arm/asm.S
+@@ -111,11 +111,17 @@ FUNC    .func   \name
+ ELF     .size   \name, . - \name
+         .purgem endconst
+     .endm
+-.if HAVE_SECTION_DATA_REL_RO && \relocate
++#if HAVE_SECTION_DATA_REL_RO
++.if \relocate
+         .section        .data.rel.ro
+ .else
+         .section        .rodata
+ .endif
++#elif !defined(__MACH__)
++        .section        .rodata
++#else
++        .const_data
++#endif
+         .align          \align
+ \name:
+ .endm
+-- 
+2.7.4
+
diff --git a/contrib/src/ffmpeg/0003-arm-swscale-Only-compile-the-rgb2yuv-asm-if-.dn-alia.patch b/contrib/src/ffmpeg/0003-arm-swscale-Only-compile-the-rgb2yuv-asm-if-.dn-alia.patch
new file mode 100644 (file)
index 0000000..d726fc3
--- /dev/null
@@ -0,0 +1,111 @@
+From b4ad8b2a18be134c2963371f4da1d80aff8ab433 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
+Date: Sat, 31 Mar 2018 21:54:32 +0300
+Subject: [PATCH 3/5] arm: swscale: Only compile the rgb2yuv asm if .dn aliases
+ are supported
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Vanilla clang supports altmacro since clang 5.0, and thus doesn't
+require gas-preprocessor for building the arm assembly any longer.
+
+However, the built-in assembler doesn't support .dn directives.
+
+This readds checks that were removed in d7320ca3ed10f0d, when
+the last usage of .dn directives within libav were removed.
+
+Alternatively, the assembly could be rewritten to not use the
+.dn directive, making it available to clang users.
+
+Signed-off-by: Martin Storsjö <martin@martin.st>
+---
+ configure                         | 5 +++++
+ libswscale/arm/rgb2yuv_neon_16.S  | 3 +++
+ libswscale/arm/rgb2yuv_neon_32.S  | 3 +++
+ libswscale/arm/swscale_unscaled.c | 6 ++++++
+ 4 files changed, 17 insertions(+)
+
+diff --git a/configure b/configure
+index d5bbb5b..20c5565 100755
+--- a/configure
++++ b/configure
+@@ -2063,6 +2063,7 @@ SYSTEM_LIBRARIES="
+ TOOLCHAIN_FEATURES="
+     as_arch_directive
++    as_dn_directive
+     as_fpu_directive
+     as_func
+     as_object_arch
+@@ -5397,6 +5398,10 @@ EOF
+     check_as <<EOF && enable as_arch_directive
+ .arch armv7-a
+ EOF
++    check_as <<EOF && enable as_dn_directive
++ra .dn d0.i16
++.unreq ra
++EOF
+     check_as <<EOF && enable as_fpu_directive
+ .fpu neon
+ EOF
+diff --git a/libswscale/arm/rgb2yuv_neon_16.S b/libswscale/arm/rgb2yuv_neon_16.S
+index 601bc9a..ad7e679 100644
+--- a/libswscale/arm/rgb2yuv_neon_16.S
++++ b/libswscale/arm/rgb2yuv_neon_16.S
+@@ -18,6 +18,8 @@
+  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+  */
++#include "config.h"
++#if HAVE_AS_DN_DIRECTIVE
+ #include "rgb2yuv_neon_common.S"
+ /* downsampled R16G16B16 x8 */
+@@ -78,3 +80,4 @@ alias_qw    c8x8x2, q10
+ .endm
+     loop_420sp  rgbx, nv12, init, kernel_420_16x2, 16
++#endif
+diff --git a/libswscale/arm/rgb2yuv_neon_32.S b/libswscale/arm/rgb2yuv_neon_32.S
+index f51a5f1..4fd0f64 100644
+--- a/libswscale/arm/rgb2yuv_neon_32.S
++++ b/libswscale/arm/rgb2yuv_neon_32.S
+@@ -18,6 +18,8 @@
+  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+  */
++#include "config.h"
++#if HAVE_AS_DN_DIRECTIVE
+ #include "rgb2yuv_neon_common.S"
+ /* downsampled R16G16B16 x8 */
+@@ -117,3 +119,4 @@ alias_qw    c8x8x2, q10
+     loop_420sp  rgbx, nv12, init, kernel_420_16x2, 32
++#endif
+diff --git a/libswscale/arm/swscale_unscaled.c b/libswscale/arm/swscale_unscaled.c
+index e1597ab..e41f294 100644
+--- a/libswscale/arm/swscale_unscaled.c
++++ b/libswscale/arm/swscale_unscaled.c
+@@ -23,6 +23,7 @@
+ #include "libswscale/swscale_internal.h"
+ #include "libavutil/arm/cpu.h"
++#if HAVE_AS_DN_DIRECTIVE
+ extern void rgbx_to_nv12_neon_32(const uint8_t *src, uint8_t *y, uint8_t *chroma,
+                 int width, int height,
+                 int y_stride, int c_stride, int src_stride,
+@@ -178,3 +179,8 @@ void ff_get_unscaled_swscale_arm(SwsContext *c)
+     if (have_neon(cpu_flags))
+         get_unscaled_swscale_neon(c);
+ }
++#else
++void ff_get_unscaled_swscale_arm(SwsContext *c)
++{
++}
++#endif
+-- 
+2.7.4
+
diff --git a/contrib/src/ffmpeg/0004-arm-hevcdsp-Avoid-using-macro-expansion-counters.patch b/contrib/src/ffmpeg/0004-arm-hevcdsp-Avoid-using-macro-expansion-counters.patch
new file mode 100644 (file)
index 0000000..d8eed9f
--- /dev/null
@@ -0,0 +1,61 @@
+From abb4a27ace289212626a20b200a42aa90bf4de8f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
+Date: Sat, 31 Mar 2018 21:54:41 +0300
+Subject: [PATCH 4/5] arm: hevcdsp: Avoid using macro expansion counters
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Clang supports the macro expansion counter (used for making unique
+labels within macro expansions), but not when targeting darwin.
+
+Convert uses of the counter into normal local labels, as used
+elsewhere.
+
+Since Xcode 9.3, the bundled clang supports altmacro and doesn't
+require using gas-preprocessor any longer.
+
+Signed-off-by: Martin Storsjö <martin@martin.st>
+---
+ libavcodec/arm/hevcdsp_deblock_neon.S | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/libavcodec/arm/hevcdsp_deblock_neon.S b/libavcodec/arm/hevcdsp_deblock_neon.S
+index 166bddb..7cb7487 100644
+--- a/libavcodec/arm/hevcdsp_deblock_neon.S
++++ b/libavcodec/arm/hevcdsp_deblock_neon.S
+@@ -152,7 +152,7 @@
+         and        r9, r8, r7
+         cmp        r9, #0
+-        beq        weakfilter_\@
++        beq        1f
+         vadd.i16  q2, q11, q12
+         vadd.i16  q4, q9, q8
+@@ -210,11 +210,11 @@
+         vbit      q13, q3, q5
+         vbit      q14, q2, q5
+-weakfilter_\@:
++1:
+         mvn       r8, r8
+         and       r9, r8, r7
+         cmp       r9, #0
+-        beq       ready_\@
++        beq       2f
+         vdup.16    q4, r2
+@@ -275,7 +275,7 @@ weakfilter_\@:
+         vbit      q11, q0, q5
+         vbit      q12, q4, q5
+-ready_\@:
++2:
+         vqmovun.s16 d16, q8
+         vqmovun.s16 d18, q9
+         vqmovun.s16 d20, q10
+-- 
+2.7.4
+
diff --git a/contrib/src/ffmpeg/0005-arm-hevcdsp-Add-commas-between-macro-arguments.patch b/contrib/src/ffmpeg/0005-arm-hevcdsp-Add-commas-between-macro-arguments.patch
new file mode 100644 (file)
index 0000000..c7133af
--- /dev/null
@@ -0,0 +1,121 @@
+From ecd4c9276b8407b912551ddb74b376cbcbe02e30 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
+Date: Sat, 31 Mar 2018 21:54:46 +0300
+Subject: [PATCH 5/5] arm: hevcdsp: Add commas between macro arguments
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When targeting darwin, clang requires commas between arguments,
+while the no-comma form is allowed for other targets.
+
+Since Xcode 9.3, the bundled clang supports altmacro and doesn't
+require using gas-preprocessor any longer.
+
+Signed-off-by: Martin Storsjö <martin@martin.st>
+---
+ libavcodec/arm/hevcdsp_qpel_neon.S | 36 ++++++++++++++++++------------------
+ 1 file changed, 18 insertions(+), 18 deletions(-)
+
+diff --git a/libavcodec/arm/hevcdsp_qpel_neon.S b/libavcodec/arm/hevcdsp_qpel_neon.S
+index 86f92cf..caa6efa 100644
+--- a/libavcodec/arm/hevcdsp_qpel_neon.S
++++ b/libavcodec/arm/hevcdsp_qpel_neon.S
+@@ -667,76 +667,76 @@ endfunc
+ function ff_hevc_put_qpel_h1v1_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_1 qpel_filter_1_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_1, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_h2v1_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_2 qpel_filter_1_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_2, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_h3v1_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_3 qpel_filter_1_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_3, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_h1v2_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_1 qpel_filter_2_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_1, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_h2v2_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_2 qpel_filter_2_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_2, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_h3v2_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_3 qpel_filter_2_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_3, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_h1v3_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_1 qpel_filter_3_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_1, qpel_filter_3_32b
+ endfunc
+ function ff_hevc_put_qpel_h2v3_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_2 qpel_filter_3_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_2, qpel_filter_3_32b
+ endfunc
+ function ff_hevc_put_qpel_h3v3_neon_8, export=1
+-        hevc_put_qpel_hXvY_neon_8 qpel_filter_3 qpel_filter_3_32b
++        hevc_put_qpel_hXvY_neon_8 qpel_filter_3, qpel_filter_3_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h1v1_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1 qpel_filter_1_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h2v1_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2 qpel_filter_1_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h3v1_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3 qpel_filter_1_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3, qpel_filter_1_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h1v2_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1 qpel_filter_2_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h2v2_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2 qpel_filter_2_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h3v2_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3 qpel_filter_2_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3, qpel_filter_2_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h1v3_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1 qpel_filter_3_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_1, qpel_filter_3_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h2v3_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2 qpel_filter_3_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_2, qpel_filter_3_32b
+ endfunc
+ function ff_hevc_put_qpel_uw_h3v3_neon_8, export=1
+-        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3 qpel_filter_3_32b
++        hevc_put_qpel_uw_hXvY_neon_8 qpel_filter_3, qpel_filter_3_32b
+ endfunc
+ .macro init_put_pixels
+-- 
+2.7.4
+
index 548171a..948d76d 100644 (file)
@@ -236,7 +236,12 @@ ffmpeg: ffmpeg-$(FFMPEG_BASENAME).tar.xz .sum-ffmpeg
        rm -Rf $@ $@-$(FFMPEG_BASENAME)
        mkdir -p $@-$(FFMPEG_BASENAME)
        tar xvJf "$<" --strip-components=1 -C $@-$(FFMPEG_BASENAME)
+       $(APPLY) $(SRC)/ffmpeg/0001-arm-vc1dsp-Add-commas-between-macro-arguments.patch
+       $(APPLY) $(SRC)/ffmpeg/0002-arm-Produce-.const_data-instead-of-.section-.rodata-.patch
 ifdef USE_FFMPEG
+       $(APPLY) $(SRC)/ffmpeg/0003-arm-swscale-Only-compile-the-rgb2yuv-asm-if-.dn-alia.patch
+       $(APPLY) $(SRC)/ffmpeg/0004-arm-hevcdsp-Avoid-using-macro-expansion-counters.patch
+       $(APPLY) $(SRC)/ffmpeg/0005-arm-hevcdsp-Add-commas-between-macro-arguments.patch
        $(APPLY) $(SRC)/ffmpeg/armv7_fixup.patch
        $(APPLY) $(SRC)/ffmpeg/dxva_vc1_crash.patch
        $(APPLY) $(SRC)/ffmpeg/h264_early_SAR.patch