Merge commit 'c23ce454b3e33634a188d6facfd2b7182af5af93'
authorMichael Niedermayer <michaelni@gmx.at>
Thu, 17 Jul 2014 19:55:37 +0000 (21:55 +0200)
committerMichael Niedermayer <michaelni@gmx.at>
Thu, 17 Jul 2014 20:07:52 +0000 (22:07 +0200)
* commit 'c23ce454b3e33634a188d6facfd2b7182af5af93':
  x86: dsputil: Coalesce all init files

Conflicts:
libavcodec/x86/dsputil_init.c
libavcodec/x86/dsputil_x86.h
libavcodec/x86/motion_est.c

Merged-by: Michael Niedermayer <michaelni@gmx.at>
1  2 
libavcodec/x86/Makefile
libavcodec/x86/dirac_dwt.c
libavcodec/x86/diracdsp_mmx.c
libavcodec/x86/dsputil_init.c
libavcodec/x86/snowdsp.c

@@@ -3,15 -3,12 +3,14 @@@ OBJS                                   
  
  OBJS-$(CONFIG_AC3DSP)                  += x86/ac3dsp_init.o
  OBJS-$(CONFIG_AUDIODSP)                += x86/audiodsp_init.o
 -OBJS-$(CONFIG_BLOCKDSP)                += x86/blockdsp.o
 +OBJS-$(CONFIG_BLOCKDSP)                += x86/blockdsp_init.o
  OBJS-$(CONFIG_BSWAPDSP)                += x86/bswapdsp_init.o
  OBJS-$(CONFIG_DCT)                     += x86/dct_init.o
- OBJS-$(CONFIG_DSPUTIL)                 += x86/dsputil_init.o            \
-                                           x86/motion_est.o
+ OBJS-$(CONFIG_DSPUTIL)                 += x86/dsputil_init.o
  OBJS-$(CONFIG_FDCTDSP)                 += x86/fdctdsp_init.o
  OBJS-$(CONFIG_FFT)                     += x86/fft_init.o
 +OBJS-$(CONFIG_FLAC_DECODER)            += x86/flacdsp_init.o
 +OBJS-$(CONFIG_FLAC_ENCODER)            += x86/flacdsp_init.o
  OBJS-$(CONFIG_H263DSP)                 += x86/h263dsp_init.o
  OBJS-$(CONFIG_H264CHROMA)              += x86/h264chroma_init.o
  OBJS-$(CONFIG_H264DSP)                 += x86/h264dsp_init.o
index 04c514f,0000000..3c51ea6
mode 100644,000000..100644
--- /dev/null
@@@ -1,202 -1,0 +1,202 @@@
- #include "dsputil_x86.h"
 +/*
 + * MMX optimized discrete wavelet transform
 + * Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
 + * Copyright (c) 2010 David Conrad
 + *
 + * This file is part of FFmpeg.
 + *
 + * FFmpeg is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU Lesser General Public
 + * License as published by the Free Software Foundation; either
 + * version 2.1 of the License, or (at your option) any later version.
 + *
 + * FFmpeg is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 + * Lesser General Public License for more details.
 + *
 + * You should have received a copy of the GNU Lesser General Public
 + * License along with FFmpeg; if not, write to the Free Software
 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 + */
 +
 +#include "libavutil/x86/asm.h"
++#include "libavutil/x86/cpu.h"
 +#include "dirac_dwt.h"
 +
 +#define COMPOSE_VERTICAL(ext, align) \
 +void ff_vertical_compose53iL0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, int width); \
 +void ff_vertical_compose_dirac53iH0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, int width); \
 +void ff_vertical_compose_dd137iL0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, int width); \
 +void ff_vertical_compose_dd97iH0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, int width); \
 +void ff_vertical_compose_haar##ext(IDWTELEM *b0, IDWTELEM *b1, int width); \
 +void ff_horizontal_compose_haar0i##ext(IDWTELEM *b, IDWTELEM *tmp, int w);\
 +void ff_horizontal_compose_haar1i##ext(IDWTELEM *b, IDWTELEM *tmp, int w);\
 +\
 +static void vertical_compose53iL0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, int width) \
 +{ \
 +    int i, width_align = width&~(align-1); \
 +\
 +    for(i=width_align; i<width; i++) \
 +        b1[i] = COMPOSE_53iL0(b0[i], b1[i], b2[i]); \
 +\
 +    ff_vertical_compose53iL0##ext(b0, b1, b2, width_align); \
 +} \
 +\
 +static void vertical_compose_dirac53iH0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, int width) \
 +{ \
 +    int i, width_align = width&~(align-1); \
 +\
 +    for(i=width_align; i<width; i++) \
 +        b1[i] = COMPOSE_DIRAC53iH0(b0[i], b1[i], b2[i]); \
 +\
 +    ff_vertical_compose_dirac53iH0##ext(b0, b1, b2, width_align); \
 +} \
 +\
 +static void vertical_compose_dd137iL0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, \
 +                                           IDWTELEM *b3, IDWTELEM *b4, int width) \
 +{ \
 +    int i, width_align = width&~(align-1); \
 +\
 +    for(i=width_align; i<width; i++) \
 +        b2[i] = COMPOSE_DD137iL0(b0[i], b1[i], b2[i], b3[i], b4[i]); \
 +\
 +    ff_vertical_compose_dd137iL0##ext(b0, b1, b2, b3, b4, width_align); \
 +} \
 +\
 +static void vertical_compose_dd97iH0##ext(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, \
 +                                          IDWTELEM *b3, IDWTELEM *b4, int width) \
 +{ \
 +    int i, width_align = width&~(align-1); \
 +\
 +    for(i=width_align; i<width; i++) \
 +        b2[i] = COMPOSE_DD97iH0(b0[i], b1[i], b2[i], b3[i], b4[i]); \
 +\
 +    ff_vertical_compose_dd97iH0##ext(b0, b1, b2, b3, b4, width_align); \
 +} \
 +static void vertical_compose_haar##ext(IDWTELEM *b0, IDWTELEM *b1, int width) \
 +{ \
 +    int i, width_align = width&~(align-1); \
 +\
 +    for(i=width_align; i<width; i++) { \
 +        b0[i] = COMPOSE_HAARiL0(b0[i], b1[i]); \
 +        b1[i] = COMPOSE_HAARiH0(b1[i], b0[i]); \
 +    } \
 +\
 +    ff_vertical_compose_haar##ext(b0, b1, width_align); \
 +} \
 +static void horizontal_compose_haar0i##ext(IDWTELEM *b, IDWTELEM *tmp, int w)\
 +{\
 +    int w2= w>>1;\
 +    int x= w2 - (w2&(align-1));\
 +    ff_horizontal_compose_haar0i##ext(b, tmp, w);\
 +\
 +    for (; x < w2; x++) {\
 +        b[2*x  ] = tmp[x];\
 +        b[2*x+1] = COMPOSE_HAARiH0(b[x+w2], tmp[x]);\
 +    }\
 +}\
 +static void horizontal_compose_haar1i##ext(IDWTELEM *b, IDWTELEM *tmp, int w)\
 +{\
 +    int w2= w>>1;\
 +    int x= w2 - (w2&(align-1));\
 +    ff_horizontal_compose_haar1i##ext(b, tmp, w);\
 +\
 +    for (; x < w2; x++) {\
 +        b[2*x  ] = (tmp[x] + 1)>>1;\
 +        b[2*x+1] = (COMPOSE_HAARiH0(b[x+w2], tmp[x]) + 1)>>1;\
 +    }\
 +}\
 +\
 +
 +#if HAVE_YASM
 +#if !ARCH_X86_64
 +COMPOSE_VERTICAL(_mmx, 4)
 +#endif
 +COMPOSE_VERTICAL(_sse2, 8)
 +
 +
 +void ff_horizontal_compose_dd97i_ssse3(IDWTELEM *b, IDWTELEM *tmp, int w);
 +
 +static void horizontal_compose_dd97i_ssse3(IDWTELEM *b, IDWTELEM *tmp, int w)
 +{
 +    int w2= w>>1;
 +    int x= w2 - (w2&7);
 +    ff_horizontal_compose_dd97i_ssse3(b, tmp, w);
 +
 +    for (; x < w2; x++) {
 +        b[2*x  ] = (tmp[x] + 1)>>1;
 +        b[2*x+1] = (COMPOSE_DD97iH0(tmp[x-1], tmp[x], b[x+w2], tmp[x+1], tmp[x+2]) + 1)>>1;
 +    }
 +}
 +#endif
 +
 +void ff_spatial_idwt_init_mmx(DWTContext *d, enum dwt_type type)
 +{
 +#if HAVE_YASM
 +  int mm_flags = av_get_cpu_flags();
 +
 +#if !ARCH_X86_64
 +    if (!(mm_flags & AV_CPU_FLAG_MMX))
 +        return;
 +
 +    switch (type) {
 +    case DWT_DIRAC_DD9_7:
 +        d->vertical_compose_l0 = (void*)vertical_compose53iL0_mmx;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dd97iH0_mmx;
 +        break;
 +    case DWT_DIRAC_LEGALL5_3:
 +        d->vertical_compose_l0 = (void*)vertical_compose53iL0_mmx;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dirac53iH0_mmx;
 +        break;
 +    case DWT_DIRAC_DD13_7:
 +        d->vertical_compose_l0 = (void*)vertical_compose_dd137iL0_mmx;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dd97iH0_mmx;
 +        break;
 +    case DWT_DIRAC_HAAR0:
 +        d->vertical_compose   = (void*)vertical_compose_haar_mmx;
 +        d->horizontal_compose = horizontal_compose_haar0i_mmx;
 +        break;
 +    case DWT_DIRAC_HAAR1:
 +        d->vertical_compose   = (void*)vertical_compose_haar_mmx;
 +        d->horizontal_compose = horizontal_compose_haar1i_mmx;
 +        break;
 +    }
 +#endif
 +
 +    if (!(mm_flags & AV_CPU_FLAG_SSE2))
 +        return;
 +
 +    switch (type) {
 +    case DWT_DIRAC_DD9_7:
 +        d->vertical_compose_l0 = (void*)vertical_compose53iL0_sse2;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dd97iH0_sse2;
 +        break;
 +    case DWT_DIRAC_LEGALL5_3:
 +        d->vertical_compose_l0 = (void*)vertical_compose53iL0_sse2;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dirac53iH0_sse2;
 +        break;
 +    case DWT_DIRAC_DD13_7:
 +        d->vertical_compose_l0 = (void*)vertical_compose_dd137iL0_sse2;
 +        d->vertical_compose_h0 = (void*)vertical_compose_dd97iH0_sse2;
 +        break;
 +    case DWT_DIRAC_HAAR0:
 +        d->vertical_compose   = (void*)vertical_compose_haar_sse2;
 +        d->horizontal_compose = horizontal_compose_haar0i_sse2;
 +        break;
 +    case DWT_DIRAC_HAAR1:
 +        d->vertical_compose   = (void*)vertical_compose_haar_sse2;
 +        d->horizontal_compose = horizontal_compose_haar1i_sse2;
 +        break;
 +    }
 +
 +    if (!(mm_flags & AV_CPU_FLAG_SSSE3))
 +        return;
 +
 +    switch (type) {
 +    case DWT_DIRAC_DD9_7:
 +        d->horizontal_compose = horizontal_compose_dd97i_ssse3;
 +        break;
 +    }
 +#endif // HAVE_YASM
 +}
index a12f952,0000000..11df5e3
mode 100644,000000..100644
--- /dev/null
@@@ -1,157 -1,0 +1,156 @@@
- #include "dsputil_x86.h"
 +/*
 + * Copyright (C) 2010 David Conrad
 + *
 + * This file is part of FFmpeg.
 + *
 + * FFmpeg is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU Lesser General Public
 + * License as published by the Free Software Foundation; either
 + * version 2.1 of the License, or (at your option) any later version.
 + *
 + * FFmpeg is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 + * Lesser General Public License for more details.
 + *
 + * You should have received a copy of the GNU Lesser General Public
 + * License along with FFmpeg; if not, write to the Free Software
 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 + */
 +
 +#include "libavutil/x86/cpu.h"
 +#include "diracdsp_mmx.h"
 +#include "fpel.h"
 +
 +void ff_put_rect_clamped_mmx(uint8_t *dst, int dst_stride, const int16_t *src, int src_stride, int width, int height);
 +void ff_put_rect_clamped_sse2(uint8_t *dst, int dst_stride, const int16_t *src, int src_stride, int width, int height);
 +void ff_put_signed_rect_clamped_mmx(uint8_t *dst, int dst_stride, const int16_t *src, int src_stride, int width, int height);
 +void ff_put_signed_rect_clamped_sse2(uint8_t *dst, int dst_stride, const int16_t *src, int src_stride, int width, int height);
 +
 +#define HPEL_FILTER(MMSIZE, EXT)                                                             \
 +    void ff_dirac_hpel_filter_v_ ## EXT(uint8_t *, const uint8_t *, int, int);               \
 +    void ff_dirac_hpel_filter_h_ ## EXT(uint8_t *, const uint8_t *, int);                    \
 +                                                                                             \
 +    static void dirac_hpel_filter_ ## EXT(uint8_t *dsth, uint8_t *dstv, uint8_t *dstc,       \
 +                                          const uint8_t *src, int stride, int width, int height)   \
 +    {                                                                                        \
 +        while( height-- )                                                                    \
 +        {                                                                                    \
 +            ff_dirac_hpel_filter_v_ ## EXT(dstv-MMSIZE, src-MMSIZE, stride, width+MMSIZE+5); \
 +            ff_dirac_hpel_filter_h_ ## EXT(dsth, src, width);                                \
 +            ff_dirac_hpel_filter_h_ ## EXT(dstc, dstv, width);                               \
 +                                                                                             \
 +            dsth += stride;                                                                  \
 +            dstv += stride;                                                                  \
 +            dstc += stride;                                                                  \
 +            src  += stride;                                                                  \
 +        }                                                                                    \
 +    }
 +
 +#if !ARCH_X86_64
 +HPEL_FILTER(8, mmx)
 +#endif
 +HPEL_FILTER(16, sse2)
 +
 +#define PIXFUNC(PFX, IDX, EXT)                                                   \
 +    /*MMXDISABLEDc->PFX ## _dirac_pixels_tab[0][IDX] = ff_ ## PFX ## _dirac_pixels8_ ## EXT;*/  \
 +    c->PFX ## _dirac_pixels_tab[1][IDX] = ff_ ## PFX ## _dirac_pixels16_ ## EXT; \
 +    c->PFX ## _dirac_pixels_tab[2][IDX] = ff_ ## PFX ## _dirac_pixels32_ ## EXT
 +
 +#define DIRAC_PIXOP(OPNAME2, OPNAME, EXT)\
 +void ff_ ## OPNAME2 ## _dirac_pixels8_ ## EXT(uint8_t *dst, const uint8_t *src[5], int stride, int h)\
 +{\
 +    if (h&3)\
 +        ff_ ## OPNAME2 ## _dirac_pixels8_c(dst, src, stride, h);\
 +    else\
 +        OPNAME ## _pixels8_ ## EXT(dst, src[0], stride, h);\
 +}\
 +void ff_ ## OPNAME2 ## _dirac_pixels16_ ## EXT(uint8_t *dst, const uint8_t *src[5], int stride, int h)\
 +{\
 +    if (h&3)\
 +        ff_ ## OPNAME2 ## _dirac_pixels16_c(dst, src, stride, h);\
 +    else\
 +        OPNAME ## _pixels16_ ## EXT(dst, src[0], stride, h);\
 +}\
 +void ff_ ## OPNAME2 ## _dirac_pixels32_ ## EXT(uint8_t *dst, const uint8_t *src[5], int stride, int h)\
 +{\
 +    if (h&3) {\
 +        ff_ ## OPNAME2 ## _dirac_pixels32_c(dst, src, stride, h);\
 +    } else {\
 +        OPNAME ## _pixels16_ ## EXT(dst   , src[0]   , stride, h);\
 +        OPNAME ## _pixels16_ ## EXT(dst+16, src[0]+16, stride, h);\
 +    }\
 +}
 +
 +DIRAC_PIXOP(put, ff_put, mmx)
 +DIRAC_PIXOP(avg, ff_avg, mmx)
 +DIRAC_PIXOP(avg, ff_avg, mmxext)
 +
 +void ff_put_dirac_pixels16_sse2(uint8_t *dst, const uint8_t *src[5], int stride, int h)
 +{
 +    if (h&3)
 +        ff_put_dirac_pixels16_c(dst, src, stride, h);
 +    else
 +    ff_put_pixels16_sse2(dst, src[0], stride, h);
 +}
 +void ff_avg_dirac_pixels16_sse2(uint8_t *dst, const uint8_t *src[5], int stride, int h)
 +{
 +    if (h&3)
 +        ff_avg_dirac_pixels16_c(dst, src, stride, h);
 +    else
 +    ff_avg_pixels16_sse2(dst, src[0], stride, h);
 +}
 +void ff_put_dirac_pixels32_sse2(uint8_t *dst, const uint8_t *src[5], int stride, int h)
 +{
 +    if (h&3) {
 +        ff_put_dirac_pixels32_c(dst, src, stride, h);
 +    } else {
 +    ff_put_pixels16_sse2(dst   , src[0]   , stride, h);
 +    ff_put_pixels16_sse2(dst+16, src[0]+16, stride, h);
 +    }
 +}
 +void ff_avg_dirac_pixels32_sse2(uint8_t *dst, const uint8_t *src[5], int stride, int h)
 +{
 +    if (h&3) {
 +        ff_avg_dirac_pixels32_c(dst, src, stride, h);
 +    } else {
 +    ff_avg_pixels16_sse2(dst   , src[0]   , stride, h);
 +    ff_avg_pixels16_sse2(dst+16, src[0]+16, stride, h);
 +    }
 +}
 +
 +void ff_diracdsp_init_mmx(DiracDSPContext* c)
 +{
 +    int mm_flags = av_get_cpu_flags();
 +
 +    if (EXTERNAL_MMX(mm_flags)) {
 +    c->add_dirac_obmc[0] = ff_add_dirac_obmc8_mmx;
 +#if !ARCH_X86_64
 +    c->add_dirac_obmc[1] = ff_add_dirac_obmc16_mmx;
 +    c->add_dirac_obmc[2] = ff_add_dirac_obmc32_mmx;
 +    c->dirac_hpel_filter = dirac_hpel_filter_mmx;
 +    c->add_rect_clamped = ff_add_rect_clamped_mmx;
 +    c->put_signed_rect_clamped = ff_put_signed_rect_clamped_mmx;
 +#endif
 +    PIXFUNC(put, 0, mmx);
 +    PIXFUNC(avg, 0, mmx);
 +    }
 +
 +    if (EXTERNAL_MMXEXT(mm_flags)) {
 +        PIXFUNC(avg, 0, mmxext);
 +    }
 +
 +    if (EXTERNAL_SSE2(mm_flags)) {
 +        c->dirac_hpel_filter = dirac_hpel_filter_sse2;
 +        c->add_rect_clamped = ff_add_rect_clamped_sse2;
 +        c->put_signed_rect_clamped = ff_put_signed_rect_clamped_sse2;
 +
 +        c->add_dirac_obmc[1] = ff_add_dirac_obmc16_sse2;
 +        c->add_dirac_obmc[2] = ff_add_dirac_obmc32_sse2;
 +
 +        c->put_dirac_pixels_tab[1][0] = ff_put_dirac_pixels16_sse2;
 +        c->avg_dirac_pixels_tab[1][0] = ff_avg_dirac_pixels16_sse2;
 +        c->put_dirac_pixels_tab[2][0] = ff_put_dirac_pixels32_sse2;
 +        c->avg_dirac_pixels_tab[2][0] = ff_avg_dirac_pixels32_sse2;
 +    }
 +}
  #include "libavutil/x86/cpu.h"
  #include "libavcodec/dsputil.h"
  #include "libavcodec/mpegvideo.h"
- #include "dsputil_x86.h"
  
 -#if HAVE_INLINE_ASM
 -
 -static int sse8_mmx(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 -                    int line_size, int h)
 -{
 -    int tmp;
 -
 -    __asm__ volatile (
 -        "movl         %4, %%ecx          \n"
 -        "shr          $1, %%ecx          \n"
 -        "pxor      %%mm0, %%mm0          \n" /* mm0 = 0 */
 -        "pxor      %%mm7, %%mm7          \n" /* mm7 holds the sum */
 -        "1:                              \n"
 -        "movq       (%0), %%mm1          \n" /* mm1 = pix1[0][0 - 7] */
 -        "movq       (%1), %%mm2          \n" /* mm2 = pix2[0][0 - 7] */
 -        "movq   (%0, %3), %%mm3          \n" /* mm3 = pix1[1][0 - 7] */
 -        "movq   (%1, %3), %%mm4          \n" /* mm4 = pix2[1][0 - 7] */
 -
 -        /* todo: mm1-mm2, mm3-mm4 */
 -        /* algo: subtract mm1 from mm2 with saturation and vice versa */
 -        /*       OR the results to get absolute difference */
 -        "movq      %%mm1, %%mm5          \n"
 -        "movq      %%mm3, %%mm6          \n"
 -        "psubusb   %%mm2, %%mm1          \n"
 -        "psubusb   %%mm4, %%mm3          \n"
 -        "psubusb   %%mm5, %%mm2          \n"
 -        "psubusb   %%mm6, %%mm4          \n"
 -
 -        "por       %%mm1, %%mm2          \n"
 -        "por       %%mm3, %%mm4          \n"
 -
 -        /* now convert to 16-bit vectors so we can square them */
 -        "movq      %%mm2, %%mm1          \n"
 -        "movq      %%mm4, %%mm3          \n"
 -
 -        "punpckhbw %%mm0, %%mm2          \n"
 -        "punpckhbw %%mm0, %%mm4          \n"
 -        "punpcklbw %%mm0, %%mm1          \n" /* mm1 now spread over (mm1, mm2) */
 -        "punpcklbw %%mm0, %%mm3          \n" /* mm4 now spread over (mm3, mm4) */
 -
 -        "pmaddwd   %%mm2, %%mm2          \n"
 -        "pmaddwd   %%mm4, %%mm4          \n"
 -        "pmaddwd   %%mm1, %%mm1          \n"
 -        "pmaddwd   %%mm3, %%mm3          \n"
 -
 -        "lea (%0, %3, 2), %0             \n" /* pix1 += 2 * line_size */
 -        "lea (%1, %3, 2), %1             \n" /* pix2 += 2 * line_size */
 -
 -        "paddd     %%mm2, %%mm1          \n"
 -        "paddd     %%mm4, %%mm3          \n"
 -        "paddd     %%mm1, %%mm7          \n"
 -        "paddd     %%mm3, %%mm7          \n"
 -
 -        "decl      %%ecx                 \n"
 -        "jnz       1b                    \n"
 -
 -        "movq      %%mm7, %%mm1          \n"
 -        "psrlq       $32, %%mm7          \n" /* shift hi dword to lo */
 -        "paddd     %%mm7, %%mm1          \n"
 -        "movd      %%mm1, %2             \n"
 -        : "+r" (pix1), "+r" (pix2), "=r" (tmp)
 -        : "r" ((x86_reg) line_size), "m" (h)
 -        : "%ecx");
 -
 -    return tmp;
 -}
 -
 -static int sse16_mmx(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 -                     int line_size, int h)
 -{
 -    int tmp;
 -
 -    __asm__ volatile (
 -        "movl %4, %%ecx\n"
 -        "pxor %%mm0, %%mm0\n"    /* mm0 = 0 */
 -        "pxor %%mm7, %%mm7\n"    /* mm7 holds the sum */
 -        "1:\n"
 -        "movq (%0), %%mm1\n"     /* mm1 = pix1[0 -  7] */
 -        "movq (%1), %%mm2\n"     /* mm2 = pix2[0 -  7] */
 -        "movq 8(%0), %%mm3\n"    /* mm3 = pix1[8 - 15] */
 -        "movq 8(%1), %%mm4\n"    /* mm4 = pix2[8 - 15] */
 -
 -        /* todo: mm1-mm2, mm3-mm4 */
 -        /* algo: subtract mm1 from mm2 with saturation and vice versa */
 -        /*       OR the results to get absolute difference */
 -        "movq %%mm1, %%mm5\n"
 -        "movq %%mm3, %%mm6\n"
 -        "psubusb %%mm2, %%mm1\n"
 -        "psubusb %%mm4, %%mm3\n"
 -        "psubusb %%mm5, %%mm2\n"
 -        "psubusb %%mm6, %%mm4\n"
 -
 -        "por %%mm1, %%mm2\n"
 -        "por %%mm3, %%mm4\n"
 -
 -        /* now convert to 16-bit vectors so we can square them */
 -        "movq %%mm2, %%mm1\n"
 -        "movq %%mm4, %%mm3\n"
 -
 -        "punpckhbw %%mm0, %%mm2\n"
 -        "punpckhbw %%mm0, %%mm4\n"
 -        "punpcklbw %%mm0, %%mm1\n" /* mm1 now spread over (mm1, mm2) */
 -        "punpcklbw %%mm0, %%mm3\n" /* mm4 now spread over (mm3, mm4) */
 -
 -        "pmaddwd %%mm2, %%mm2\n"
 -        "pmaddwd %%mm4, %%mm4\n"
 -        "pmaddwd %%mm1, %%mm1\n"
 -        "pmaddwd %%mm3, %%mm3\n"
 -
 -        "add %3, %0\n"
 -        "add %3, %1\n"
 -
 -        "paddd %%mm2, %%mm1\n"
 -        "paddd %%mm4, %%mm3\n"
 -        "paddd %%mm1, %%mm7\n"
 -        "paddd %%mm3, %%mm7\n"
 -
 -        "decl %%ecx\n"
 -        "jnz 1b\n"
 -
 -        "movq %%mm7, %%mm1\n"
 -        "psrlq $32, %%mm7\n"    /* shift hi dword to lo */
 -        "paddd %%mm7, %%mm1\n"
 -        "movd %%mm1, %2\n"
 -        : "+r" (pix1), "+r" (pix2), "=r" (tmp)
 -        : "r" ((x86_reg) line_size), "m" (h)
 -        : "%ecx");
 -
 -    return tmp;
 -}
 -
 -static int hf_noise8_mmx(uint8_t *pix1, int line_size, int h)
 -{
 -    int tmp;
 -
 -    __asm__ volatile (
 -        "movl %3, %%ecx\n"
 -        "pxor %%mm7, %%mm7\n"
 -        "pxor %%mm6, %%mm6\n"
 -
 -        "movq (%0), %%mm0\n"
 -        "movq %%mm0, %%mm1\n"
 -        "psllq $8, %%mm0\n"
 -        "psrlq $8, %%mm1\n"
 -        "psrlq $8, %%mm0\n"
 -        "movq %%mm0, %%mm2\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm0\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm2\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm0\n"
 -        "psubw %%mm3, %%mm2\n"
 -
 -        "add %2, %0\n"
 -
 -        "movq (%0), %%mm4\n"
 -        "movq %%mm4, %%mm1\n"
 -        "psllq $8, %%mm4\n"
 -        "psrlq $8, %%mm1\n"
 -        "psrlq $8, %%mm4\n"
 -        "movq %%mm4, %%mm5\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm4\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm5\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm4\n"
 -        "psubw %%mm3, %%mm5\n"
 -        "psubw %%mm4, %%mm0\n"
 -        "psubw %%mm5, %%mm2\n"
 -        "pxor %%mm3, %%mm3\n"
 -        "pxor %%mm1, %%mm1\n"
 -        "pcmpgtw %%mm0, %%mm3\n\t"
 -        "pcmpgtw %%mm2, %%mm1\n\t"
 -        "pxor %%mm3, %%mm0\n"
 -        "pxor %%mm1, %%mm2\n"
 -        "psubw %%mm3, %%mm0\n"
 -        "psubw %%mm1, %%mm2\n"
 -        "paddw %%mm0, %%mm2\n"
 -        "paddw %%mm2, %%mm6\n"
 -
 -        "add %2, %0\n"
 -        "1:\n"
 -
 -        "movq (%0), %%mm0\n"
 -        "movq %%mm0, %%mm1\n"
 -        "psllq $8, %%mm0\n"
 -        "psrlq $8, %%mm1\n"
 -        "psrlq $8, %%mm0\n"
 -        "movq %%mm0, %%mm2\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm0\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm2\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm0\n"
 -        "psubw %%mm3, %%mm2\n"
 -        "psubw %%mm0, %%mm4\n"
 -        "psubw %%mm2, %%mm5\n"
 -        "pxor  %%mm3, %%mm3\n"
 -        "pxor  %%mm1, %%mm1\n"
 -        "pcmpgtw %%mm4, %%mm3\n\t"
 -        "pcmpgtw %%mm5, %%mm1\n\t"
 -        "pxor  %%mm3, %%mm4\n"
 -        "pxor  %%mm1, %%mm5\n"
 -        "psubw %%mm3, %%mm4\n"
 -        "psubw %%mm1, %%mm5\n"
 -        "paddw %%mm4, %%mm5\n"
 -        "paddw %%mm5, %%mm6\n"
 -
 -        "add %2, %0\n"
 -
 -        "movq (%0), %%mm4\n"
 -        "movq      %%mm4, %%mm1\n"
 -        "psllq $8, %%mm4\n"
 -        "psrlq $8, %%mm1\n"
 -        "psrlq $8, %%mm4\n"
 -        "movq      %%mm4, %%mm5\n"
 -        "movq      %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm4\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm5\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw     %%mm1, %%mm4\n"
 -        "psubw     %%mm3, %%mm5\n"
 -        "psubw     %%mm4, %%mm0\n"
 -        "psubw     %%mm5, %%mm2\n"
 -        "pxor      %%mm3, %%mm3\n"
 -        "pxor      %%mm1, %%mm1\n"
 -        "pcmpgtw   %%mm0, %%mm3\n\t"
 -        "pcmpgtw   %%mm2, %%mm1\n\t"
 -        "pxor      %%mm3, %%mm0\n"
 -        "pxor      %%mm1, %%mm2\n"
 -        "psubw     %%mm3, %%mm0\n"
 -        "psubw     %%mm1, %%mm2\n"
 -        "paddw     %%mm0, %%mm2\n"
 -        "paddw     %%mm2, %%mm6\n"
 -
 -        "add  %2, %0\n"
 -        "subl $2, %%ecx\n"
 -        " jnz 1b\n"
 -
 -        "movq      %%mm6, %%mm0\n"
 -        "punpcklwd %%mm7, %%mm0\n"
 -        "punpckhwd %%mm7, %%mm6\n"
 -        "paddd     %%mm0, %%mm6\n"
 -
 -        "movq  %%mm6, %%mm0\n"
 -        "psrlq $32,   %%mm6\n"
 -        "paddd %%mm6, %%mm0\n"
 -        "movd  %%mm0, %1\n"
 -        : "+r" (pix1), "=r" (tmp)
 -        : "r" ((x86_reg) line_size), "g" (h - 2)
 -        : "%ecx");
 -
 -    return tmp;
 -}
 -
 -static int hf_noise16_mmx(uint8_t *pix1, int line_size, int h)
 -{
 -    int tmp;
 -    uint8_t *pix = pix1;
 -
 -    __asm__ volatile (
 -        "movl %3, %%ecx\n"
 -        "pxor %%mm7, %%mm7\n"
 -        "pxor %%mm6, %%mm6\n"
 -
 -        "movq (%0), %%mm0\n"
 -        "movq 1(%0), %%mm1\n"
 -        "movq %%mm0, %%mm2\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm0\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm2\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm0\n"
 -        "psubw %%mm3, %%mm2\n"
 -
 -        "add %2, %0\n"
 -
 -        "movq (%0), %%mm4\n"
 -        "movq 1(%0), %%mm1\n"
 -        "movq %%mm4, %%mm5\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm4\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm5\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm4\n"
 -        "psubw %%mm3, %%mm5\n"
 -        "psubw %%mm4, %%mm0\n"
 -        "psubw %%mm5, %%mm2\n"
 -        "pxor %%mm3, %%mm3\n"
 -        "pxor %%mm1, %%mm1\n"
 -        "pcmpgtw %%mm0, %%mm3\n\t"
 -        "pcmpgtw %%mm2, %%mm1\n\t"
 -        "pxor %%mm3, %%mm0\n"
 -        "pxor %%mm1, %%mm2\n"
 -        "psubw %%mm3, %%mm0\n"
 -        "psubw %%mm1, %%mm2\n"
 -        "paddw %%mm0, %%mm2\n"
 -        "paddw %%mm2, %%mm6\n"
 -
 -        "add %2, %0\n"
 -        "1:\n"
 -
 -        "movq (%0), %%mm0\n"
 -        "movq 1(%0), %%mm1\n"
 -        "movq %%mm0, %%mm2\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm0\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm2\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm0\n"
 -        "psubw %%mm3, %%mm2\n"
 -        "psubw %%mm0, %%mm4\n"
 -        "psubw %%mm2, %%mm5\n"
 -        "pxor %%mm3, %%mm3\n"
 -        "pxor %%mm1, %%mm1\n"
 -        "pcmpgtw %%mm4, %%mm3\n\t"
 -        "pcmpgtw %%mm5, %%mm1\n\t"
 -        "pxor %%mm3, %%mm4\n"
 -        "pxor %%mm1, %%mm5\n"
 -        "psubw %%mm3, %%mm4\n"
 -        "psubw %%mm1, %%mm5\n"
 -        "paddw %%mm4, %%mm5\n"
 -        "paddw %%mm5, %%mm6\n"
 -
 -        "add %2, %0\n"
 -
 -        "movq (%0), %%mm4\n"
 -        "movq 1(%0), %%mm1\n"
 -        "movq %%mm4, %%mm5\n"
 -        "movq %%mm1, %%mm3\n"
 -        "punpcklbw %%mm7, %%mm4\n"
 -        "punpcklbw %%mm7, %%mm1\n"
 -        "punpckhbw %%mm7, %%mm5\n"
 -        "punpckhbw %%mm7, %%mm3\n"
 -        "psubw %%mm1, %%mm4\n"
 -        "psubw %%mm3, %%mm5\n"
 -        "psubw %%mm4, %%mm0\n"
 -        "psubw %%mm5, %%mm2\n"
 -        "pxor %%mm3, %%mm3\n"
 -        "pxor %%mm1, %%mm1\n"
 -        "pcmpgtw %%mm0, %%mm3\n\t"
 -        "pcmpgtw %%mm2, %%mm1\n\t"
 -        "pxor %%mm3, %%mm0\n"
 -        "pxor %%mm1, %%mm2\n"
 -        "psubw %%mm3, %%mm0\n"
 -        "psubw %%mm1, %%mm2\n"
 -        "paddw %%mm0, %%mm2\n"
 -        "paddw %%mm2, %%mm6\n"
 -
 -        "add %2, %0\n"
 -        "subl $2, %%ecx\n"
 -        " jnz 1b\n"
 -
 -        "movq %%mm6, %%mm0\n"
 -        "punpcklwd %%mm7, %%mm0\n"
 -        "punpckhwd %%mm7, %%mm6\n"
 -        "paddd %%mm0, %%mm6\n"
 +int ff_sum_abs_dctelem_mmx(int16_t *block);
 +int ff_sum_abs_dctelem_mmxext(int16_t *block);
 +int ff_sum_abs_dctelem_sse2(int16_t *block);
 +int ff_sum_abs_dctelem_ssse3(int16_t *block);
 +int ff_sse8_mmx(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 +                int line_size, int h);
 +int ff_sse16_mmx(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 +                 int line_size, int h);
 +int ff_sse16_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 +                  int line_size, int h);
 +int ff_hf_noise8_mmx(uint8_t *pix1, int lsize, int h);
 +int ff_hf_noise16_mmx(uint8_t *pix1, int lsize, int h);
  
 -        "movq %%mm6, %%mm0\n"
 -        "psrlq $32, %%mm6\n"
 -        "paddd %%mm6, %%mm0\n"
 -        "movd %%mm0, %1\n"
 -        : "+r" (pix1), "=r" (tmp)
 -        : "r" ((x86_reg) line_size), "g" (h - 2)
 -        : "%ecx");
 +#define hadamard_func(cpu)                                              \
 +    int ff_hadamard8_diff_ ## cpu(MpegEncContext *s, uint8_t *src1,     \
 +                                  uint8_t *src2, int stride, int h);    \
 +    int ff_hadamard8_diff16_ ## cpu(MpegEncContext *s, uint8_t *src1,   \
 +                                    uint8_t *src2, int stride, int h);
  
 -    return tmp + hf_noise8_mmx(pix + 8, line_size, h);
 -}
 +hadamard_func(mmx)
 +hadamard_func(mmxext)
 +hadamard_func(sse2)
 +hadamard_func(ssse3)
  
 +#if HAVE_YASM
  static int nsse16_mmx(MpegEncContext *c, uint8_t *pix1, uint8_t *pix2,
                        int line_size, int h)
  {
@@@ -338,29 -684,615 +337,474 @@@ static int vsad16_mmxext(MpegEncContex
  }
  #undef SUM
  
 -#define MMABS_MMX(a,z)                          \
 -    "pxor "    #z ", " #z "             \n\t"   \
 -    "pcmpgtw " #a ", " #z "             \n\t"   \
 -    "pxor "    #z ", " #a "             \n\t"   \
 -    "psubw "   #z ", " #a "             \n\t"
 -
 -#define MMABS_MMXEXT(a, z)                      \
 -    "pxor "    #z ", " #z "             \n\t"   \
 -    "psubw "   #a ", " #z "             \n\t"   \
 -    "pmaxsw "  #z ", " #a "             \n\t"
 -
 -#define MMABS_SSSE3(a,z)                        \
 -    "pabsw "   #a ", " #a "             \n\t"
 -
 -#define MMABS_SUM(a,z, sum)                     \
 -    MMABS(a,z)                                  \
 -    "paddusw " #a ", " #sum "           \n\t"
 -
 -/* FIXME: HSUM_* saturates at 64k, while an 8x8 hadamard or dct block can get
 - * up to about 100k on extreme inputs. But that's very unlikely to occur in
 - * natural video, and it's even more unlikely to not have any alternative
 - * mvs/modes with lower cost. */
 -#define HSUM_MMX(a, t, dst)                     \
 -    "movq    " #a ", " #t "             \n\t"   \
 -    "psrlq      $32, " #a "             \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "movq    " #a ", " #t "             \n\t"   \
 -    "psrlq      $16, " #a "             \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "movd    " #a ", " #dst "           \n\t"   \
 -
 -#define HSUM_MMXEXT(a, t, dst)                  \
 -    "pshufw   $0x0E, " #a ", " #t "     \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "pshufw   $0x01, " #a ", " #t "     \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "movd    " #a ", " #dst "           \n\t"   \
 -
 -#define HSUM_SSE2(a, t, dst)                    \
 -    "movhlps " #a ", " #t "             \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "pshuflw  $0x0E, " #a ", " #t "     \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "pshuflw  $0x01, " #a ", " #t "     \n\t"   \
 -    "paddusw " #t ", " #a "             \n\t"   \
 -    "movd    " #a ", " #dst "           \n\t"   \
 -
 -#define DCT_SAD4(m, mm, o)                      \
 -    "mov"#m" "#o" +  0(%1), " #mm "2    \n\t"   \
 -    "mov"#m" "#o" + 16(%1), " #mm "3    \n\t"   \
 -    "mov"#m" "#o" + 32(%1), " #mm "4    \n\t"   \
 -    "mov"#m" "#o" + 48(%1), " #mm "5    \n\t"   \
 -    MMABS_SUM(mm ## 2, mm ## 6, mm ## 0)        \
 -    MMABS_SUM(mm ## 3, mm ## 7, mm ## 1)        \
 -    MMABS_SUM(mm ## 4, mm ## 6, mm ## 0)        \
 -    MMABS_SUM(mm ## 5, mm ## 7, mm ## 1)        \
 -
 -#define DCT_SAD_MMX                             \
 -    "pxor    %%mm0, %%mm0               \n\t"   \
 -    "pxor    %%mm1, %%mm1               \n\t"   \
 -    DCT_SAD4(q, %%mm, 0)                        \
 -    DCT_SAD4(q, %%mm, 8)                        \
 -    DCT_SAD4(q, %%mm, 64)                       \
 -    DCT_SAD4(q, %%mm, 72)                       \
 -    "paddusw %%mm1, %%mm0               \n\t"   \
 -    HSUM(%%mm0, %%mm1, %0)
 -
 -#define DCT_SAD_SSE2                            \
 -    "pxor    %%xmm0, %%xmm0             \n\t"   \
 -    "pxor    %%xmm1, %%xmm1             \n\t"   \
 -    DCT_SAD4(dqa, %%xmm, 0)                     \
 -    DCT_SAD4(dqa, %%xmm, 64)                    \
 -    "paddusw %%xmm1, %%xmm0             \n\t"   \
 -    HSUM(%%xmm0, %%xmm1, %0)
 -
 -#define DCT_SAD_FUNC(cpu)                           \
 -static int sum_abs_dctelem_ ## cpu(int16_t *block)  \
 -{                                                   \
 -    int sum;                                        \
 -    __asm__ volatile (                              \
 -        DCT_SAD                                     \
 -        :"=r"(sum)                                  \
 -        :"r"(block));                               \
 -    return sum & 0xFFFF;                            \
 -}
 -
 -#define DCT_SAD         DCT_SAD_MMX
 -#define HSUM(a, t, dst) HSUM_MMX(a, t, dst)
 -#define MMABS(a, z)     MMABS_MMX(a, z)
 -DCT_SAD_FUNC(mmx)
 -#undef MMABS
 -#undef HSUM
 -
 -#define HSUM(a, t, dst) HSUM_MMXEXT(a, t, dst)
 -#define MMABS(a, z)     MMABS_MMXEXT(a, z)
 -DCT_SAD_FUNC(mmxext)
 -#undef HSUM
 -#undef DCT_SAD
 -
 -#define DCT_SAD         DCT_SAD_SSE2
 -#define HSUM(a, t, dst) HSUM_SSE2(a, t, dst)
 -DCT_SAD_FUNC(sse2)
 -#undef MMABS
 -
 -#if HAVE_SSSE3_INLINE
 -#define MMABS(a, z)     MMABS_SSSE3(a, z)
 -DCT_SAD_FUNC(ssse3)
 -#undef MMABS
 -#endif
 -#undef HSUM
 -#undef DCT_SAD
  
 -    x86_reg len = -(stride * h);
+ DECLARE_ASM_CONST(8, uint64_t, round_tab)[3] = {
+     0x0000000000000000ULL,
+     0x0001000100010001ULL,
+     0x0002000200020002ULL,
+ };
+ DECLARE_ASM_CONST(8, uint64_t, bone) = 0x0101010101010101LL;
+ static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
+ {
 -        : "r" ((x86_reg) stride));
++    x86_reg len = -(x86_reg)stride * h;
+     __asm__ volatile (
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1, %%"REG_a"), %%mm0    \n\t"
+         "movq (%2, %%"REG_a"), %%mm2    \n\t"
+         "movq (%2, %%"REG_a"), %%mm4    \n\t"
+         "add %3, %%"REG_a"              \n\t"
+         "psubusb %%mm0, %%mm2           \n\t"
+         "psubusb %%mm4, %%mm0           \n\t"
+         "movq (%1, %%"REG_a"), %%mm1    \n\t"
+         "movq (%2, %%"REG_a"), %%mm3    \n\t"
+         "movq (%2, %%"REG_a"), %%mm5    \n\t"
+         "psubusb %%mm1, %%mm3           \n\t"
+         "psubusb %%mm5, %%mm1           \n\t"
+         "por %%mm2, %%mm0               \n\t"
+         "por %%mm1, %%mm3               \n\t"
+         "movq %%mm0, %%mm1              \n\t"
+         "movq %%mm3, %%mm2              \n\t"
+         "punpcklbw %%mm7, %%mm0         \n\t"
+         "punpckhbw %%mm7, %%mm1         \n\t"
+         "punpcklbw %%mm7, %%mm3         \n\t"
+         "punpckhbw %%mm7, %%mm2         \n\t"
+         "paddw %%mm1, %%mm0             \n\t"
+         "paddw %%mm3, %%mm2             \n\t"
+         "paddw %%mm2, %%mm0             \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "add %3, %%"REG_a"              \n\t"
+         " js 1b                         \n\t"
+         : "+a" (len)
+         : "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg) stride));
+ }
+ static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
+                                  int stride, int h)
+ {
+     __asm__ volatile (
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1), %%mm0               \n\t"
+         "movq (%1, %3), %%mm1           \n\t"
+         "psadbw (%2), %%mm0             \n\t"
+         "psadbw (%2, %3), %%mm1         \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "paddw %%mm1, %%mm6             \n\t"
+         "lea (%1,%3,2), %1              \n\t"
+         "lea (%2,%3,2), %2              \n\t"
+         "sub $2, %0                     \n\t"
+         " jg 1b                         \n\t"
+         : "+r" (h), "+r" (blk1), "+r" (blk2)
+         : "r" ((x86_reg) stride));
+ }
+ static int sad16_sse2(MpegEncContext *v, uint8_t *blk2, uint8_t *blk1,
+                       int stride, int h)
+ {
+     int ret;
+     __asm__ volatile (
+         "pxor %%xmm2, %%xmm2            \n\t"
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movdqu (%1), %%xmm0            \n\t"
+         "movdqu (%1, %4), %%xmm1        \n\t"
+         "psadbw (%2), %%xmm0            \n\t"
+         "psadbw (%2, %4), %%xmm1        \n\t"
+         "paddw %%xmm0, %%xmm2           \n\t"
+         "paddw %%xmm1, %%xmm2           \n\t"
+         "lea (%1,%4,2), %1              \n\t"
+         "lea (%2,%4,2), %2              \n\t"
+         "sub $2, %0                     \n\t"
+         " jg 1b                         \n\t"
+         "movhlps %%xmm2, %%xmm0         \n\t"
+         "paddw   %%xmm0, %%xmm2         \n\t"
+         "movd    %%xmm2, %3             \n\t"
+         : "+r" (h), "+r" (blk1), "+r" (blk2), "=r" (ret)
+         : "r" ((x86_reg) stride));
+     return ret;
+ }
+ static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
+                                    int stride, int h)
+ {
+     __asm__ volatile (
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1), %%mm0               \n\t"
+         "movq (%1, %3), %%mm1           \n\t"
+         "pavgb 1(%1), %%mm0             \n\t"
+         "pavgb 1(%1, %3), %%mm1         \n\t"
+         "psadbw (%2), %%mm0             \n\t"
+         "psadbw (%2, %3), %%mm1         \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "paddw %%mm1, %%mm6             \n\t"
+         "lea (%1,%3,2), %1              \n\t"
+         "lea (%2,%3,2), %2              \n\t"
+         "sub $2, %0                     \n\t"
+         " jg 1b                         \n\t"
+         : "+r" (h), "+r" (blk1), "+r" (blk2)
+         : "r" ((x86_reg) stride));
+ }
+ static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
+                                    int stride, int h)
+ {
+     __asm__ volatile (
+         "movq (%1), %%mm0               \n\t"
+         "add %3, %1                     \n\t"
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1), %%mm1               \n\t"
+         "movq (%1, %3), %%mm2           \n\t"
+         "pavgb %%mm1, %%mm0             \n\t"
+         "pavgb %%mm2, %%mm1             \n\t"
+         "psadbw (%2), %%mm0             \n\t"
+         "psadbw (%2, %3), %%mm1         \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "paddw %%mm1, %%mm6             \n\t"
+         "movq %%mm2, %%mm0              \n\t"
+         "lea (%1,%3,2), %1              \n\t"
+         "lea (%2,%3,2), %2              \n\t"
+         "sub $2, %0                     \n\t"
+         " jg 1b                         \n\t"
+         : "+r" (h), "+r" (blk1), "+r" (blk2)
+         : "r" ((x86_reg) stride));
+ }
+ static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
+                                  int stride, int h)
+ {
+     __asm__ volatile (
+         "movq "MANGLE(bone)", %%mm5     \n\t"
+         "movq (%1), %%mm0               \n\t"
+         "pavgb 1(%1), %%mm0             \n\t"
+         "add %3, %1                     \n\t"
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1), %%mm1               \n\t"
+         "movq (%1,%3), %%mm2            \n\t"
+         "pavgb 1(%1), %%mm1             \n\t"
+         "pavgb 1(%1,%3), %%mm2          \n\t"
+         "psubusb %%mm5, %%mm1           \n\t"
+         "pavgb %%mm1, %%mm0             \n\t"
+         "pavgb %%mm2, %%mm1             \n\t"
+         "psadbw (%2), %%mm0             \n\t"
+         "psadbw (%2,%3), %%mm1          \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "paddw %%mm1, %%mm6             \n\t"
+         "movq %%mm2, %%mm0              \n\t"
+         "lea (%1,%3,2), %1              \n\t"
+         "lea (%2,%3,2), %2              \n\t"
+         "sub $2, %0                     \n\t"
+         " jg 1b                         \n\t"
+         : "+r" (h), "+r" (blk1), "+r" (blk2)
 -    x86_reg len = -(stride * h);
++        : "r" ((x86_reg) stride)
++          NAMED_CONSTRAINTS_ADD(bone));
+ }
+ static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2,
+                               int stride, int h)
+ {
 -    x86_reg len = -(stride * h);
++    x86_reg len = -(x86_reg)stride * h;
+     __asm__ volatile (
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq (%1, %%"REG_a"), %%mm0    \n\t"
+         "movq (%2, %%"REG_a"), %%mm1    \n\t"
+         "movq (%1, %%"REG_a"), %%mm2    \n\t"
+         "movq (%2, %%"REG_a"), %%mm3    \n\t"
+         "punpcklbw %%mm7, %%mm0         \n\t"
+         "punpcklbw %%mm7, %%mm1         \n\t"
+         "punpckhbw %%mm7, %%mm2         \n\t"
+         "punpckhbw %%mm7, %%mm3         \n\t"
+         "paddw %%mm0, %%mm1             \n\t"
+         "paddw %%mm2, %%mm3             \n\t"
+         "movq (%3, %%"REG_a"), %%mm4    \n\t"
+         "movq (%3, %%"REG_a"), %%mm2    \n\t"
+         "paddw %%mm5, %%mm1             \n\t"
+         "paddw %%mm5, %%mm3             \n\t"
+         "psrlw $1, %%mm1                \n\t"
+         "psrlw $1, %%mm3                \n\t"
+         "packuswb %%mm3, %%mm1          \n\t"
+         "psubusb %%mm1, %%mm4           \n\t"
+         "psubusb %%mm2, %%mm1           \n\t"
+         "por %%mm4, %%mm1               \n\t"
+         "movq %%mm1, %%mm0              \n\t"
+         "punpcklbw %%mm7, %%mm0         \n\t"
+         "punpckhbw %%mm7, %%mm1         \n\t"
+         "paddw %%mm1, %%mm0             \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "add %4, %%"REG_a"              \n\t"
+         " js 1b                         \n\t"
+         : "+a" (len)
+         : "r" (blk1a - len), "r" (blk1b - len), "r" (blk2 - len),
+           "r" ((x86_reg) stride));
+ }
+ static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
+ {
 -        "movq 16+"MANGLE(round_tab)", %%mm5 \n\t"
++    x86_reg len = -(x86_reg)stride * h;
+     __asm__ volatile (
+         "movq  (%1, %%"REG_a"), %%mm0   \n\t"
+         "movq 1(%1, %%"REG_a"), %%mm2   \n\t"
+         "movq %%mm0, %%mm1              \n\t"
+         "movq %%mm2, %%mm3              \n\t"
+         "punpcklbw %%mm7, %%mm0         \n\t"
+         "punpckhbw %%mm7, %%mm1         \n\t"
+         "punpcklbw %%mm7, %%mm2         \n\t"
+         "punpckhbw %%mm7, %%mm3         \n\t"
+         "paddw %%mm2, %%mm0             \n\t"
+         "paddw %%mm3, %%mm1             \n\t"
+         ".p2align 4                     \n\t"
+         "1:                             \n\t"
+         "movq  (%2, %%"REG_a"), %%mm2   \n\t"
+         "movq 1(%2, %%"REG_a"), %%mm4   \n\t"
+         "movq %%mm2, %%mm3              \n\t"
+         "movq %%mm4, %%mm5              \n\t"
+         "punpcklbw %%mm7, %%mm2         \n\t"
+         "punpckhbw %%mm7, %%mm3         \n\t"
+         "punpcklbw %%mm7, %%mm4         \n\t"
+         "punpckhbw %%mm7, %%mm5         \n\t"
+         "paddw %%mm4, %%mm2             \n\t"
+         "paddw %%mm5, %%mm3             \n\t"
 -          "r" ((x86_reg) stride));
++        "movq %5, %%mm5                 \n\t"
+         "paddw %%mm2, %%mm0             \n\t"
+         "paddw %%mm3, %%mm1             \n\t"
+         "paddw %%mm5, %%mm0             \n\t"
+         "paddw %%mm5, %%mm1             \n\t"
+         "movq (%3, %%"REG_a"), %%mm4    \n\t"
+         "movq (%3, %%"REG_a"), %%mm5    \n\t"
+         "psrlw $2, %%mm0                \n\t"
+         "psrlw $2, %%mm1                \n\t"
+         "packuswb %%mm1, %%mm0          \n\t"
+         "psubusb %%mm0, %%mm4           \n\t"
+         "psubusb %%mm5, %%mm0           \n\t"
+         "por %%mm4, %%mm0               \n\t"
+         "movq %%mm0, %%mm4              \n\t"
+         "punpcklbw %%mm7, %%mm0         \n\t"
+         "punpckhbw %%mm7, %%mm4         \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "paddw %%mm4, %%mm6             \n\t"
+         "movq  %%mm2, %%mm0             \n\t"
+         "movq  %%mm3, %%mm1             \n\t"
+         "add %4, %%"REG_a"              \n\t"
+         " js 1b                         \n\t"
+         : "+a" (len)
+         : "r" (blk1 - len), "r" (blk1 - len + stride), "r" (blk2 - len),
 -    assert(h == 8);                                                     \
++          "r" ((x86_reg) stride), "m" (round_tab[2]));
+ }
+ static inline int sum_mmx(void)
+ {
+     int ret;
+     __asm__ volatile (
+         "movq %%mm6, %%mm0              \n\t"
+         "psrlq $32, %%mm6               \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "movq %%mm6, %%mm0              \n\t"
+         "psrlq $16, %%mm6               \n\t"
+         "paddw %%mm0, %%mm6             \n\t"
+         "movd %%mm6, %0                 \n\t"
+         : "=r" (ret));
+     return ret & 0xFFFF;
+ }
+ static inline int sum_mmxext(void)
+ {
+     int ret;
+     __asm__ volatile (
+         "movd %%mm6, %0                 \n\t"
+         : "=r" (ret));
+     return ret;
+ }
+ static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
+ {
+     sad8_2_mmx(blk1, blk1 + 1, blk2, stride, h);
+ }
+ static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
+ {
+     sad8_2_mmx(blk1, blk1 + stride, blk2, stride, h);
+ }
+ #define PIX_SAD(suf)                                                    \
+ static int sad8_ ## suf(MpegEncContext *v, uint8_t *blk2,               \
+                         uint8_t *blk1, int stride, int h)               \
+ {                                                                       \
 -    assert(h == 8);                                                     \
++    av_assert2(h == 8);                                                     \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         :);                                                             \
+                                                                         \
+     sad8_1_ ## suf(blk1, blk2, stride, 8);                              \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad8_x2_ ## suf(MpegEncContext *v, uint8_t *blk2,            \
+                            uint8_t *blk1, int stride, int h)            \
+ {                                                                       \
 -    assert(h == 8);                                                     \
++    av_assert2(h == 8);                                                     \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         "movq %0, %%mm5        \n\t"                                    \
+         :: "m" (round_tab[1]));                                         \
+                                                                         \
+     sad8_x2a_ ## suf(blk1, blk2, stride, 8);                            \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad8_y2_ ## suf(MpegEncContext *v, uint8_t *blk2,            \
+                            uint8_t *blk1, int stride, int h)            \
+ {                                                                       \
 -    assert(h == 8);                                                     \
++    av_assert2(h == 8);                                                     \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         "movq %0, %%mm5        \n\t"                                    \
+         :: "m" (round_tab[1]));                                         \
+                                                                         \
+     sad8_y2a_ ## suf(blk1, blk2, stride, 8);                            \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad8_xy2_ ## suf(MpegEncContext *v, uint8_t *blk2,           \
+                             uint8_t *blk1, int stride, int h)           \
+ {                                                                       \
++    av_assert2(h == 8);                                                     \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         ::);                                                            \
+                                                                         \
+     sad8_4_ ## suf(blk1, blk2, stride, 8);                              \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad16_ ## suf(MpegEncContext *v, uint8_t *blk2,              \
+                          uint8_t *blk1, int stride, int h)              \
+ {                                                                       \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         :);                                                             \
+                                                                         \
+     sad8_1_ ## suf(blk1,     blk2,     stride, h);                      \
+     sad8_1_ ## suf(blk1 + 8, blk2 + 8, stride, h);                      \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad16_x2_ ## suf(MpegEncContext *v, uint8_t *blk2,           \
+                             uint8_t *blk1, int stride, int h)           \
+ {                                                                       \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         "movq %0, %%mm5        \n\t"                                    \
+         :: "m" (round_tab[1]));                                         \
+                                                                         \
+     sad8_x2a_ ## suf(blk1,     blk2,     stride, h);                    \
+     sad8_x2a_ ## suf(blk1 + 8, blk2 + 8, stride, h);                    \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad16_y2_ ## suf(MpegEncContext *v, uint8_t *blk2,           \
+                             uint8_t *blk1, int stride, int h)           \
+ {                                                                       \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         "movq %0, %%mm5        \n\t"                                    \
+         :: "m" (round_tab[1]));                                         \
+                                                                         \
+     sad8_y2a_ ## suf(blk1,     blk2,     stride, h);                    \
+     sad8_y2a_ ## suf(blk1 + 8, blk2 + 8, stride, h);                    \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+                                                                         \
+ static int sad16_xy2_ ## suf(MpegEncContext *v, uint8_t *blk2,          \
+                              uint8_t *blk1, int stride, int h)          \
+ {                                                                       \
+     __asm__ volatile (                                                  \
+         "pxor %%mm7, %%mm7     \n\t"                                    \
+         "pxor %%mm6, %%mm6     \n\t"                                    \
+         ::);                                                            \
+                                                                         \
+     sad8_4_ ## suf(blk1,     blk2,     stride, h);                      \
+     sad8_4_ ## suf(blk1 + 8, blk2 + 8, stride, h);                      \
+                                                                         \
+     return sum_ ## suf();                                               \
+ }                                                                       \
+ PIX_SAD(mmx)
+ PIX_SAD(mmxext)
  #endif /* HAVE_INLINE_ASM */
  
 -int ff_sse16_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
 -                  int line_size, int h);
 -
 -#define hadamard_func(cpu)                                              \
 -    int ff_hadamard8_diff_ ## cpu(MpegEncContext *s, uint8_t *src1,     \
 -                                  uint8_t *src2, int stride, int h);    \
 -    int ff_hadamard8_diff16_ ## cpu(MpegEncContext *s, uint8_t *src1,   \
 -                                    uint8_t *src2, int stride, int h);
 -
 -hadamard_func(mmx)
 -hadamard_func(mmxext)
 -hadamard_func(sse2)
 -hadamard_func(ssse3)
 -
  av_cold void ff_dsputil_init_x86(DSPContext *c, AVCodecContext *avctx)
  {
      int cpu_flags = av_get_cpu_flags();
  
  #if HAVE_INLINE_ASM
      if (INLINE_MMX(cpu_flags)) {
 -        c->sum_abs_dctelem = sum_abs_dctelem_mmx;
 -
+         c->pix_abs[0][0] = sad16_mmx;
+         c->pix_abs[0][1] = sad16_x2_mmx;
+         c->pix_abs[0][2] = sad16_y2_mmx;
+         c->pix_abs[0][3] = sad16_xy2_mmx;
+         c->pix_abs[1][0] = sad8_mmx;
+         c->pix_abs[1][1] = sad8_x2_mmx;
+         c->pix_abs[1][2] = sad8_y2_mmx;
+         c->pix_abs[1][3] = sad8_xy2_mmx;
+         c->sad[0] = sad16_mmx;
+         c->sad[1] = sad8_mmx;
 -        c->sse[0]  = sse16_mmx;
 -        c->sse[1]  = sse8_mmx;
          c->vsad[4] = vsad_intra16_mmx;
  
 -        c->nsse[0] = nsse16_mmx;
 -        c->nsse[1] = nsse8_mmx;
 -
          if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
-             c->vsad[0]      = vsad16_mmx;
+             c->vsad[0] = vsad16_mmx;
          }
      }
  
      if (INLINE_MMXEXT(cpu_flags)) {
-         c->vsad[4]         = vsad_intra16_mmxext;
 -        c->sum_abs_dctelem = sum_abs_dctelem_mmxext;
 -
+         c->vsad[4] = vsad_intra16_mmxext;
+         c->pix_abs[0][0] = sad16_mmxext;
+         c->pix_abs[1][0] = sad8_mmxext;
+         c->sad[0] = sad16_mmxext;
+         c->sad[1] = sad8_mmxext;
++        c->pix_abs[0][1] = sad16_x2_mmxext;
++        c->pix_abs[0][2] = sad16_y2_mmxext;
++        c->pix_abs[1][1] = sad8_x2_mmxext;
++        c->pix_abs[1][2] = sad8_y2_mmxext;
 +
          if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
 -            c->pix_abs[0][1] = sad16_x2_mmxext;
 -            c->pix_abs[0][2] = sad16_y2_mmxext;
+             c->pix_abs[0][3] = sad16_xy2_mmxext;
 -            c->pix_abs[1][1] = sad8_x2_mmxext;
 -            c->pix_abs[1][2] = sad8_y2_mmxext;
+             c->pix_abs[1][3] = sad8_xy2_mmxext;
              c->vsad[0] = vsad16_mmxext;
          }
      }
 -    if (INLINE_SSE2(cpu_flags)) {
 -        c->sum_abs_dctelem = sum_abs_dctelem_sse2;
 -    }
 -
 -    if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_3DNOW)) {
 -#if HAVE_SSSE3_INLINE
 -    if (INLINE_SSSE3(cpu_flags)) {
 -        c->sum_abs_dctelem = sum_abs_dctelem_ssse3;
 -    }
 -#endif
++    if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_SSE2SLOW) && avctx->codec_id != AV_CODEC_ID_SNOW) {
+         c->sad[0] = sad16_sse2;
+     }
  #endif /* HAVE_INLINE_ASM */
  
      if (EXTERNAL_MMX(cpu_flags)) {
  #endif
      }
  
 -    if (EXTERNAL_SSSE3(cpu_flags) && HAVE_ALIGNED_STACK) {
 +    if (EXTERNAL_SSSE3(cpu_flags)) {
 +        c->sum_abs_dctelem   = ff_sum_abs_dctelem_ssse3;
 +#if HAVE_ALIGNED_STACK
          c->hadamard8_diff[0] = ff_hadamard8_diff16_ssse3;
          c->hadamard8_diff[1] = ff_hadamard8_diff_ssse3;
 +#endif
      }
-     ff_dsputil_init_pix_mmx(c, avctx);
  }
index 67cb868,0000000..2778489
mode 100644,000000..100644
--- /dev/null
@@@ -1,909 -1,0 +1,908 @@@
- #include "dsputil_x86.h"
 +/*
 + * MMX and SSE2 optimized snow DSP utils
 + * Copyright (c) 2005-2006 Robert Edele <yartrebo@earthlink.net>
 + *
 + * This file is part of FFmpeg.
 + *
 + * FFmpeg is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU Lesser General Public
 + * License as published by the Free Software Foundation; either
 + * version 2.1 of the License, or (at your option) any later version.
 + *
 + * FFmpeg is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 + * Lesser General Public License for more details.
 + *
 + * You should have received a copy of the GNU Lesser General Public
 + * License along with FFmpeg; if not, write to the Free Software
 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 + */
 +
 +#include "libavutil/cpu.h"
 +#include "libavutil/x86/asm.h"
 +#include "libavcodec/avcodec.h"
 +#include "libavcodec/snow.h"
 +#include "libavcodec/snow_dwt.h"
 +
 +#if HAVE_INLINE_ASM
 +
 +static void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, IDWTELEM *temp, int width){
 +    const int w2= (width+1)>>1;
 +    const int w_l= (width>>1);
 +    const int w_r= w2 - 1;
 +    int i;
 +
 +    { // Lift 0
 +        IDWTELEM * const ref = b + w2 - 1;
 +        IDWTELEM b_0 = b[0]; //By allowing the first entry in b[0] to be calculated twice
 +        // (the first time erroneously), we allow the SSE2 code to run an extra pass.
 +        // The savings in code and time are well worth having to store this value and
 +        // calculate b[0] correctly afterwards.
 +
 +        i = 0;
 +        __asm__ volatile(
 +            "pcmpeqd   %%xmm7, %%xmm7         \n\t"
 +            "pcmpeqd   %%xmm3, %%xmm3         \n\t"
 +            "psllw         $1, %%xmm3         \n\t"
 +            "paddw     %%xmm7, %%xmm3         \n\t"
 +            "psllw        $13, %%xmm3         \n\t"
 +        ::);
 +        for(; i<w_l-15; i+=16){
 +            __asm__ volatile(
 +                "movdqu   (%1), %%xmm1        \n\t"
 +                "movdqu 16(%1), %%xmm5        \n\t"
 +                "movdqu  2(%1), %%xmm2        \n\t"
 +                "movdqu 18(%1), %%xmm6        \n\t"
 +                "paddw  %%xmm1, %%xmm2        \n\t"
 +                "paddw  %%xmm5, %%xmm6        \n\t"
 +                "paddw  %%xmm7, %%xmm2        \n\t"
 +                "paddw  %%xmm7, %%xmm6        \n\t"
 +                "pmulhw %%xmm3, %%xmm2        \n\t"
 +                "pmulhw %%xmm3, %%xmm6        \n\t"
 +                "paddw    (%0), %%xmm2        \n\t"
 +                "paddw  16(%0), %%xmm6        \n\t"
 +                "movdqa %%xmm2, (%0)          \n\t"
 +                "movdqa %%xmm6, 16(%0)        \n\t"
 +                :: "r"(&b[i]), "r"(&ref[i])
 +                : "memory"
 +            );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS);
 +        b[0] = b_0 - ((W_DM * 2 * ref[1]+W_DO)>>W_DS);
 +    }
 +
 +    { // Lift 1
 +        IDWTELEM * const dst = b+w2;
 +
 +        i = 0;
 +        for(; (((x86_reg)&dst[i]) & 0x1F) && i<w_r; i++){
 +            dst[i] = dst[i] - (b[i] + b[i + 1]);
 +        }
 +        for(; i<w_r-15; i+=16){
 +            __asm__ volatile(
 +                "movdqu   (%1), %%xmm1        \n\t"
 +                "movdqu 16(%1), %%xmm5        \n\t"
 +                "movdqu  2(%1), %%xmm2        \n\t"
 +                "movdqu 18(%1), %%xmm6        \n\t"
 +                "paddw  %%xmm1, %%xmm2        \n\t"
 +                "paddw  %%xmm5, %%xmm6        \n\t"
 +                "movdqa   (%0), %%xmm0        \n\t"
 +                "movdqa 16(%0), %%xmm4        \n\t"
 +                "psubw  %%xmm2, %%xmm0        \n\t"
 +                "psubw  %%xmm6, %%xmm4        \n\t"
 +                "movdqa %%xmm0, (%0)          \n\t"
 +                "movdqa %%xmm4, 16(%0)        \n\t"
 +                :: "r"(&dst[i]), "r"(&b[i])
 +                : "memory"
 +            );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS);
 +    }
 +
 +    { // Lift 2
 +        IDWTELEM * const ref = b+w2 - 1;
 +        IDWTELEM b_0 = b[0];
 +
 +        i = 0;
 +        __asm__ volatile(
 +            "psllw         $15, %%xmm7        \n\t"
 +            "pcmpeqw    %%xmm6, %%xmm6        \n\t"
 +            "psrlw         $13, %%xmm6        \n\t"
 +            "paddw      %%xmm7, %%xmm6        \n\t"
 +        ::);
 +        for(; i<w_l-15; i+=16){
 +            __asm__ volatile(
 +                "movdqu   (%1), %%xmm0        \n\t"
 +                "movdqu 16(%1), %%xmm4        \n\t"
 +                "movdqu  2(%1), %%xmm1        \n\t"
 +                "movdqu 18(%1), %%xmm5        \n\t" //FIXME try aligned reads and shifts
 +                "paddw  %%xmm6, %%xmm0        \n\t"
 +                "paddw  %%xmm6, %%xmm4        \n\t"
 +                "paddw  %%xmm7, %%xmm1        \n\t"
 +                "paddw  %%xmm7, %%xmm5        \n\t"
 +                "pavgw  %%xmm1, %%xmm0        \n\t"
 +                "pavgw  %%xmm5, %%xmm4        \n\t"
 +                "psubw  %%xmm7, %%xmm0        \n\t"
 +                "psubw  %%xmm7, %%xmm4        \n\t"
 +                "psraw      $1, %%xmm0        \n\t"
 +                "psraw      $1, %%xmm4        \n\t"
 +                "movdqa   (%0), %%xmm1        \n\t"
 +                "movdqa 16(%0), %%xmm5        \n\t"
 +                "paddw  %%xmm1, %%xmm0        \n\t"
 +                "paddw  %%xmm5, %%xmm4        \n\t"
 +                "psraw      $2, %%xmm0        \n\t"
 +                "psraw      $2, %%xmm4        \n\t"
 +                "paddw  %%xmm1, %%xmm0        \n\t"
 +                "paddw  %%xmm5, %%xmm4        \n\t"
 +                "movdqa %%xmm0, (%0)          \n\t"
 +                "movdqa %%xmm4, 16(%0)        \n\t"
 +                :: "r"(&b[i]), "r"(&ref[i])
 +                : "memory"
 +            );
 +        }
 +        snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l);
 +        b[0] = b_0 + ((2 * ref[1] + W_BO-1 + 4 * b_0) >> W_BS);
 +    }
 +
 +    { // Lift 3
 +        IDWTELEM * const src = b+w2;
 +
 +        i = 0;
 +        for(; (((x86_reg)&temp[i]) & 0x1F) && i<w_r; i++){
 +            temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS);
 +        }
 +        for(; i<w_r-7; i+=8){
 +            __asm__ volatile(
 +                "movdqu  2(%1), %%xmm2        \n\t"
 +                "movdqu 18(%1), %%xmm6        \n\t"
 +                "paddw    (%1), %%xmm2        \n\t"
 +                "paddw  16(%1), %%xmm6        \n\t"
 +                "movdqu   (%0), %%xmm0        \n\t"
 +                "movdqu 16(%0), %%xmm4        \n\t"
 +                "paddw  %%xmm2, %%xmm0        \n\t"
 +                "paddw  %%xmm6, %%xmm4        \n\t"
 +                "psraw      $1, %%xmm2        \n\t"
 +                "psraw      $1, %%xmm6        \n\t"
 +                "paddw  %%xmm0, %%xmm2        \n\t"
 +                "paddw  %%xmm4, %%xmm6        \n\t"
 +                "movdqa %%xmm2, (%2)          \n\t"
 +                "movdqa %%xmm6, 16(%2)        \n\t"
 +                :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i])
 +                 : "memory"
 +               );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS);
 +    }
 +
 +    {
 +        snow_interleave_line_header(&i, width, b, temp);
 +
 +        for (; (i & 0x3E) != 0x3E; i-=2){
 +            b[i+1] = temp[i>>1];
 +            b[i] = b[i>>1];
 +        }
 +        for (i-=62; i>=0; i-=64){
 +            __asm__ volatile(
 +                "movdqa      (%1), %%xmm0       \n\t"
 +                "movdqa    16(%1), %%xmm2       \n\t"
 +                "movdqa    32(%1), %%xmm4       \n\t"
 +                "movdqa    48(%1), %%xmm6       \n\t"
 +                "movdqa      (%1), %%xmm1       \n\t"
 +                "movdqa    16(%1), %%xmm3       \n\t"
 +                "movdqa    32(%1), %%xmm5       \n\t"
 +                "movdqa    48(%1), %%xmm7       \n\t"
 +                "punpcklwd   (%2), %%xmm0       \n\t"
 +                "punpcklwd 16(%2), %%xmm2       \n\t"
 +                "punpcklwd 32(%2), %%xmm4       \n\t"
 +                "punpcklwd 48(%2), %%xmm6       \n\t"
 +                "movdqa    %%xmm0, (%0)         \n\t"
 +                "movdqa    %%xmm2, 32(%0)       \n\t"
 +                "movdqa    %%xmm4, 64(%0)       \n\t"
 +                "movdqa    %%xmm6, 96(%0)       \n\t"
 +                "punpckhwd   (%2), %%xmm1       \n\t"
 +                "punpckhwd 16(%2), %%xmm3       \n\t"
 +                "punpckhwd 32(%2), %%xmm5       \n\t"
 +                "punpckhwd 48(%2), %%xmm7       \n\t"
 +                "movdqa    %%xmm1, 16(%0)       \n\t"
 +                "movdqa    %%xmm3, 48(%0)       \n\t"
 +                "movdqa    %%xmm5, 80(%0)       \n\t"
 +                "movdqa    %%xmm7, 112(%0)      \n\t"
 +                :: "r"(&(b)[i]), "r"(&(b)[i>>1]), "r"(&(temp)[i>>1])
 +                 : "memory"
 +               );
 +        }
 +    }
 +}
 +
 +static void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, IDWTELEM *temp, int width){
 +    const int w2= (width+1)>>1;
 +    const int w_l= (width>>1);
 +    const int w_r= w2 - 1;
 +    int i;
 +
 +    { // Lift 0
 +        IDWTELEM * const ref = b + w2 - 1;
 +
 +        i = 1;
 +        b[0] = b[0] - ((W_DM * 2 * ref[1]+W_DO)>>W_DS);
 +        __asm__ volatile(
 +            "pcmpeqw    %%mm7, %%mm7         \n\t"
 +            "pcmpeqw    %%mm3, %%mm3         \n\t"
 +            "psllw         $1, %%mm3         \n\t"
 +            "paddw      %%mm7, %%mm3         \n\t"
 +            "psllw        $13, %%mm3         \n\t"
 +           ::);
 +        for(; i<w_l-7; i+=8){
 +            __asm__ volatile(
 +                "movq     (%1), %%mm2        \n\t"
 +                "movq    8(%1), %%mm6        \n\t"
 +                "paddw   2(%1), %%mm2        \n\t"
 +                "paddw  10(%1), %%mm6        \n\t"
 +                "paddw   %%mm7, %%mm2        \n\t"
 +                "paddw   %%mm7, %%mm6        \n\t"
 +                "pmulhw  %%mm3, %%mm2        \n\t"
 +                "pmulhw  %%mm3, %%mm6        \n\t"
 +                "paddw    (%0), %%mm2        \n\t"
 +                "paddw   8(%0), %%mm6        \n\t"
 +                "movq    %%mm2, (%0)         \n\t"
 +                "movq    %%mm6, 8(%0)        \n\t"
 +                :: "r"(&b[i]), "r"(&ref[i])
 +                 : "memory"
 +               );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS);
 +    }
 +
 +    { // Lift 1
 +        IDWTELEM * const dst = b+w2;
 +
 +        i = 0;
 +        for(; i<w_r-7; i+=8){
 +            __asm__ volatile(
 +                "movq     (%1), %%mm2        \n\t"
 +                "movq    8(%1), %%mm6        \n\t"
 +                "paddw   2(%1), %%mm2        \n\t"
 +                "paddw  10(%1), %%mm6        \n\t"
 +                "movq     (%0), %%mm0        \n\t"
 +                "movq    8(%0), %%mm4        \n\t"
 +                "psubw   %%mm2, %%mm0        \n\t"
 +                "psubw   %%mm6, %%mm4        \n\t"
 +                "movq    %%mm0, (%0)         \n\t"
 +                "movq    %%mm4, 8(%0)        \n\t"
 +                :: "r"(&dst[i]), "r"(&b[i])
 +                 : "memory"
 +               );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS);
 +    }
 +
 +    { // Lift 2
 +        IDWTELEM * const ref = b+w2 - 1;
 +
 +        i = 1;
 +        b[0] = b[0] + (((2 * ref[1] + W_BO) + 4 * b[0]) >> W_BS);
 +        __asm__ volatile(
 +            "psllw         $15, %%mm7        \n\t"
 +            "pcmpeqw     %%mm6, %%mm6        \n\t"
 +            "psrlw         $13, %%mm6        \n\t"
 +            "paddw       %%mm7, %%mm6        \n\t"
 +           ::);
 +        for(; i<w_l-7; i+=8){
 +            __asm__ volatile(
 +                "movq     (%1), %%mm0        \n\t"
 +                "movq    8(%1), %%mm4        \n\t"
 +                "movq    2(%1), %%mm1        \n\t"
 +                "movq   10(%1), %%mm5        \n\t"
 +                "paddw   %%mm6, %%mm0        \n\t"
 +                "paddw   %%mm6, %%mm4        \n\t"
 +                "paddw   %%mm7, %%mm1        \n\t"
 +                "paddw   %%mm7, %%mm5        \n\t"
 +                "pavgw   %%mm1, %%mm0        \n\t"
 +                "pavgw   %%mm5, %%mm4        \n\t"
 +                "psubw   %%mm7, %%mm0        \n\t"
 +                "psubw   %%mm7, %%mm4        \n\t"
 +                "psraw      $1, %%mm0        \n\t"
 +                "psraw      $1, %%mm4        \n\t"
 +                "movq     (%0), %%mm1        \n\t"
 +                "movq    8(%0), %%mm5        \n\t"
 +                "paddw   %%mm1, %%mm0        \n\t"
 +                "paddw   %%mm5, %%mm4        \n\t"
 +                "psraw      $2, %%mm0        \n\t"
 +                "psraw      $2, %%mm4        \n\t"
 +                "paddw   %%mm1, %%mm0        \n\t"
 +                "paddw   %%mm5, %%mm4        \n\t"
 +                "movq    %%mm0, (%0)         \n\t"
 +                "movq    %%mm4, 8(%0)        \n\t"
 +                :: "r"(&b[i]), "r"(&ref[i])
 +                 : "memory"
 +               );
 +        }
 +        snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l);
 +    }
 +
 +    { // Lift 3
 +        IDWTELEM * const src = b+w2;
 +        i = 0;
 +
 +        for(; i<w_r-7; i+=8){
 +            __asm__ volatile(
 +                "movq    2(%1), %%mm2        \n\t"
 +                "movq   10(%1), %%mm6        \n\t"
 +                "paddw    (%1), %%mm2        \n\t"
 +                "paddw   8(%1), %%mm6        \n\t"
 +                "movq     (%0), %%mm0        \n\t"
 +                "movq    8(%0), %%mm4        \n\t"
 +                "paddw   %%mm2, %%mm0        \n\t"
 +                "paddw   %%mm6, %%mm4        \n\t"
 +                "psraw      $1, %%mm2        \n\t"
 +                "psraw      $1, %%mm6        \n\t"
 +                "paddw   %%mm0, %%mm2        \n\t"
 +                "paddw   %%mm4, %%mm6        \n\t"
 +                "movq    %%mm2, (%2)         \n\t"
 +                "movq    %%mm6, 8(%2)        \n\t"
 +                :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i])
 +                 : "memory"
 +               );
 +        }
 +        snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS);
 +    }
 +
 +    {
 +        snow_interleave_line_header(&i, width, b, temp);
 +
 +        for (; (i & 0x1E) != 0x1E; i-=2){
 +            b[i+1] = temp[i>>1];
 +            b[i] = b[i>>1];
 +        }
 +        for (i-=30; i>=0; i-=32){
 +            __asm__ volatile(
 +                "movq        (%1), %%mm0       \n\t"
 +                "movq       8(%1), %%mm2       \n\t"
 +                "movq      16(%1), %%mm4       \n\t"
 +                "movq      24(%1), %%mm6       \n\t"
 +                "movq        (%1), %%mm1       \n\t"
 +                "movq       8(%1), %%mm3       \n\t"
 +                "movq      16(%1), %%mm5       \n\t"
 +                "movq      24(%1), %%mm7       \n\t"
 +                "punpcklwd   (%2), %%mm0       \n\t"
 +                "punpcklwd  8(%2), %%mm2       \n\t"
 +                "punpcklwd 16(%2), %%mm4       \n\t"
 +                "punpcklwd 24(%2), %%mm6       \n\t"
 +                "movq       %%mm0, (%0)        \n\t"
 +                "movq       %%mm2, 16(%0)      \n\t"
 +                "movq       %%mm4, 32(%0)      \n\t"
 +                "movq       %%mm6, 48(%0)      \n\t"
 +                "punpckhwd   (%2), %%mm1       \n\t"
 +                "punpckhwd  8(%2), %%mm3       \n\t"
 +                "punpckhwd 16(%2), %%mm5       \n\t"
 +                "punpckhwd 24(%2), %%mm7       \n\t"
 +                "movq       %%mm1, 8(%0)       \n\t"
 +                "movq       %%mm3, 24(%0)      \n\t"
 +                "movq       %%mm5, 40(%0)      \n\t"
 +                "movq       %%mm7, 56(%0)      \n\t"
 +                :: "r"(&b[i]), "r"(&b[i>>1]), "r"(&temp[i>>1])
 +                 : "memory"
 +               );
 +        }
 +    }
 +}
 +
 +#if HAVE_7REGS
 +#define snow_vertical_compose_sse2_load_add(op,r,t0,t1,t2,t3)\
 +        ""op" ("r",%%"REG_d"), %%"t0"      \n\t"\
 +        ""op" 16("r",%%"REG_d"), %%"t1"    \n\t"\
 +        ""op" 32("r",%%"REG_d"), %%"t2"    \n\t"\
 +        ""op" 48("r",%%"REG_d"), %%"t3"    \n\t"
 +
 +#define snow_vertical_compose_sse2_load(r,t0,t1,t2,t3)\
 +        snow_vertical_compose_sse2_load_add("movdqa",r,t0,t1,t2,t3)
 +
 +#define snow_vertical_compose_sse2_add(r,t0,t1,t2,t3)\
 +        snow_vertical_compose_sse2_load_add("paddw",r,t0,t1,t2,t3)
 +
 +#define snow_vertical_compose_r2r_sub(s0,s1,s2,s3,t0,t1,t2,t3)\
 +        "psubw %%"s0", %%"t0" \n\t"\
 +        "psubw %%"s1", %%"t1" \n\t"\
 +        "psubw %%"s2", %%"t2" \n\t"\
 +        "psubw %%"s3", %%"t3" \n\t"
 +
 +#define snow_vertical_compose_sse2_store(w,s0,s1,s2,s3)\
 +        "movdqa %%"s0", ("w",%%"REG_d")      \n\t"\
 +        "movdqa %%"s1", 16("w",%%"REG_d")    \n\t"\
 +        "movdqa %%"s2", 32("w",%%"REG_d")    \n\t"\
 +        "movdqa %%"s3", 48("w",%%"REG_d")    \n\t"
 +
 +#define snow_vertical_compose_sra(n,t0,t1,t2,t3)\
 +        "psraw $"n", %%"t0" \n\t"\
 +        "psraw $"n", %%"t1" \n\t"\
 +        "psraw $"n", %%"t2" \n\t"\
 +        "psraw $"n", %%"t3" \n\t"
 +
 +#define snow_vertical_compose_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\
 +        "paddw %%"s0", %%"t0" \n\t"\
 +        "paddw %%"s1", %%"t1" \n\t"\
 +        "paddw %%"s2", %%"t2" \n\t"\
 +        "paddw %%"s3", %%"t3" \n\t"
 +
 +#define snow_vertical_compose_r2r_pmulhw(s0,s1,s2,s3,t0,t1,t2,t3)\
 +        "pmulhw %%"s0", %%"t0" \n\t"\
 +        "pmulhw %%"s1", %%"t1" \n\t"\
 +        "pmulhw %%"s2", %%"t2" \n\t"\
 +        "pmulhw %%"s3", %%"t3" \n\t"
 +
 +#define snow_vertical_compose_sse2_move(s0,s1,s2,s3,t0,t1,t2,t3)\
 +        "movdqa %%"s0", %%"t0" \n\t"\
 +        "movdqa %%"s1", %%"t1" \n\t"\
 +        "movdqa %%"s2", %%"t2" \n\t"\
 +        "movdqa %%"s3", %%"t3" \n\t"
 +
 +static void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
 +    x86_reg i = width;
 +
 +    while(i & 0x1F)
 +    {
 +        i--;
 +        b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS;
 +        b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS;
 +        b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS;
 +        b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS;
 +    }
 +    i+=i;
 +
 +         __asm__ volatile (
 +        "jmp 2f                                      \n\t"
 +        "1:                                          \n\t"
 +        snow_vertical_compose_sse2_load("%4","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%6","xmm0","xmm2","xmm4","xmm6")
 +
 +
 +        "pcmpeqw    %%xmm0, %%xmm0                   \n\t"
 +        "pcmpeqw    %%xmm2, %%xmm2                   \n\t"
 +        "paddw      %%xmm2, %%xmm2                   \n\t"
 +        "paddw      %%xmm0, %%xmm2                   \n\t"
 +        "psllw         $13, %%xmm2                   \n\t"
 +        snow_vertical_compose_r2r_add("xmm0","xmm0","xmm0","xmm0","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_r2r_pmulhw("xmm2","xmm2","xmm2","xmm2","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_sse2_add("%5","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_sse2_store("%5","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_sse2_load("%4","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%3","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_r2r_sub("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_store("%4","xmm0","xmm2","xmm4","xmm6")
 +
 +        "pcmpeqw %%xmm7, %%xmm7                      \n\t"
 +        "pcmpeqw %%xmm5, %%xmm5                      \n\t"
 +        "psllw $15, %%xmm7                           \n\t"
 +        "psrlw $13, %%xmm5                           \n\t"
 +        "paddw %%xmm7, %%xmm5                        \n\t"
 +        snow_vertical_compose_r2r_add("xmm5","xmm5","xmm5","xmm5","xmm0","xmm2","xmm4","xmm6")
 +        "movq   (%2,%%"REG_d"), %%xmm1        \n\t"
 +        "movq  8(%2,%%"REG_d"), %%xmm3        \n\t"
 +        "paddw %%xmm7, %%xmm1                        \n\t"
 +        "paddw %%xmm7, %%xmm3                        \n\t"
 +        "pavgw %%xmm1, %%xmm0                        \n\t"
 +        "pavgw %%xmm3, %%xmm2                        \n\t"
 +        "movq 16(%2,%%"REG_d"), %%xmm1        \n\t"
 +        "movq 24(%2,%%"REG_d"), %%xmm3        \n\t"
 +        "paddw %%xmm7, %%xmm1                        \n\t"
 +        "paddw %%xmm7, %%xmm3                        \n\t"
 +        "pavgw %%xmm1, %%xmm4                        \n\t"
 +        "pavgw %%xmm3, %%xmm6                        \n\t"
 +        snow_vertical_compose_r2r_sub("xmm7","xmm7","xmm7","xmm7","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sra("1","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%3","xmm0","xmm2","xmm4","xmm6")
 +
 +        snow_vertical_compose_sra("2","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%3","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_store("%3","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%1","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")
 +        snow_vertical_compose_sra("1","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_add("%2","xmm0","xmm2","xmm4","xmm6")
 +        snow_vertical_compose_sse2_store("%2","xmm0","xmm2","xmm4","xmm6")
 +
 +        "2:                                          \n\t"
 +        "sub $64, %%"REG_d"                          \n\t"
 +        "jge 1b                                      \n\t"
 +        :"+d"(i)
 +        :"r"(b0),"r"(b1),"r"(b2),"r"(b3),"r"(b4),"r"(b5));
 +}
 +
 +#define snow_vertical_compose_mmx_load_add(op,r,t0,t1,t2,t3)\
 +        ""op" ("r",%%"REG_d"), %%"t0"   \n\t"\
 +        ""op" 8("r",%%"REG_d"), %%"t1"  \n\t"\
 +        ""op" 16("r",%%"REG_d"), %%"t2" \n\t"\
 +        ""op" 24("r",%%"REG_d"), %%"t3" \n\t"
 +
 +#define snow_vertical_compose_mmx_load(r,t0,t1,t2,t3)\
 +        snow_vertical_compose_mmx_load_add("movq",r,t0,t1,t2,t3)
 +
 +#define snow_vertical_compose_mmx_add(r,t0,t1,t2,t3)\
 +        snow_vertical_compose_mmx_load_add("paddw",r,t0,t1,t2,t3)
 +
 +#define snow_vertical_compose_mmx_store(w,s0,s1,s2,s3)\
 +        "movq %%"s0", ("w",%%"REG_d")   \n\t"\
 +        "movq %%"s1", 8("w",%%"REG_d")  \n\t"\
 +        "movq %%"s2", 16("w",%%"REG_d") \n\t"\
 +        "movq %%"s3", 24("w",%%"REG_d") \n\t"
 +
 +#define snow_vertical_compose_mmx_move(s0,s1,s2,s3,t0,t1,t2,t3)\
 +        "movq %%"s0", %%"t0" \n\t"\
 +        "movq %%"s1", %%"t1" \n\t"\
 +        "movq %%"s2", %%"t2" \n\t"\
 +        "movq %%"s3", %%"t3" \n\t"
 +
 +
 +static void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){
 +    x86_reg i = width;
 +    while(i & 15)
 +    {
 +        i--;
 +        b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS;
 +        b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS;
 +        b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS;
 +        b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS;
 +    }
 +    i+=i;
 +    __asm__ volatile(
 +        "jmp 2f                                      \n\t"
 +        "1:                                          \n\t"
 +
 +        snow_vertical_compose_mmx_load("%4","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_mmx_add("%6","mm1","mm3","mm5","mm7")
 +        "pcmpeqw    %%mm0, %%mm0                     \n\t"
 +        "pcmpeqw    %%mm2, %%mm2                     \n\t"
 +        "paddw      %%mm2, %%mm2                     \n\t"
 +        "paddw      %%mm0, %%mm2                     \n\t"
 +        "psllw        $13, %%mm2                     \n\t"
 +        snow_vertical_compose_r2r_add("mm0","mm0","mm0","mm0","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_r2r_pmulhw("mm2","mm2","mm2","mm2","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_mmx_add("%5","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_mmx_store("%5","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_mmx_load("%4","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_add("%3","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_r2r_sub("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_store("%4","mm0","mm2","mm4","mm6")
 +        "pcmpeqw %%mm7, %%mm7                        \n\t"
 +        "pcmpeqw %%mm5, %%mm5                        \n\t"
 +        "psllw $15, %%mm7                            \n\t"
 +        "psrlw $13, %%mm5                            \n\t"
 +        "paddw %%mm7, %%mm5                          \n\t"
 +        snow_vertical_compose_r2r_add("mm5","mm5","mm5","mm5","mm0","mm2","mm4","mm6")
 +        "movq   (%2,%%"REG_d"), %%mm1         \n\t"
 +        "movq  8(%2,%%"REG_d"), %%mm3         \n\t"
 +        "paddw %%mm7, %%mm1                          \n\t"
 +        "paddw %%mm7, %%mm3                          \n\t"
 +        "pavgw %%mm1, %%mm0                          \n\t"
 +        "pavgw %%mm3, %%mm2                          \n\t"
 +        "movq 16(%2,%%"REG_d"), %%mm1         \n\t"
 +        "movq 24(%2,%%"REG_d"), %%mm3         \n\t"
 +        "paddw %%mm7, %%mm1                          \n\t"
 +        "paddw %%mm7, %%mm3                          \n\t"
 +        "pavgw %%mm1, %%mm4                          \n\t"
 +        "pavgw %%mm3, %%mm6                          \n\t"
 +        snow_vertical_compose_r2r_sub("mm7","mm7","mm7","mm7","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_sra("1","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_add("%3","mm0","mm2","mm4","mm6")
 +
 +        snow_vertical_compose_sra("2","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_add("%3","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_store("%3","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_add("%1","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7")
 +        snow_vertical_compose_sra("1","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_add("%2","mm0","mm2","mm4","mm6")
 +        snow_vertical_compose_mmx_store("%2","mm0","mm2","mm4","mm6")
 +
 +        "2:                                          \n\t"
 +        "sub $32, %%"REG_d"                          \n\t"
 +        "jge 1b                                      \n\t"
 +        :"+d"(i)
 +        :"r"(b0),"r"(b1),"r"(b2),"r"(b3),"r"(b4),"r"(b5));
 +}
 +#endif //HAVE_7REGS
 +
 +#if HAVE_6REGS
 +#define snow_inner_add_yblock_sse2_header \
 +    IDWTELEM * * dst_array = sb->line + src_y;\
 +    x86_reg tmp;\
 +    __asm__ volatile(\
 +             "mov  %7, %%"REG_c"             \n\t"\
 +             "mov  %6, %2                    \n\t"\
 +             "mov  %4, %%"REG_S"             \n\t"\
 +             "pxor %%xmm7, %%xmm7            \n\t" /* 0 */\
 +             "pcmpeqd %%xmm3, %%xmm3         \n\t"\
 +             "psllw $15, %%xmm3              \n\t"\
 +             "psrlw $12, %%xmm3              \n\t" /* FRAC_BITS >> 1 */\
 +             "1:                             \n\t"\
 +             "mov %1, %%"REG_D"              \n\t"\
 +             "mov (%%"REG_D"), %%"REG_D"     \n\t"\
 +             "add %3, %%"REG_D"              \n\t"
 +
 +#define snow_inner_add_yblock_sse2_start_8(out_reg1, out_reg2, ptr_offset, s_offset)\
 +             "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
 +             "movq (%%"REG_d"), %%"out_reg1" \n\t"\
 +             "movq (%%"REG_d", %%"REG_c"), %%"out_reg2" \n\t"\
 +             "punpcklbw %%xmm7, %%"out_reg1" \n\t"\
 +             "punpcklbw %%xmm7, %%"out_reg2" \n\t"\
 +             "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\
 +             "movq "s_offset"+16(%%"REG_S"), %%xmm4 \n\t"\
 +             "punpcklbw %%xmm7, %%xmm0       \n\t"\
 +             "punpcklbw %%xmm7, %%xmm4       \n\t"\
 +             "pmullw %%xmm0, %%"out_reg1"    \n\t"\
 +             "pmullw %%xmm4, %%"out_reg2"    \n\t"
 +
 +#define snow_inner_add_yblock_sse2_start_16(out_reg1, out_reg2, ptr_offset, s_offset)\
 +             "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
 +             "movq (%%"REG_d"), %%"out_reg1" \n\t"\
 +             "movq 8(%%"REG_d"), %%"out_reg2" \n\t"\
 +             "punpcklbw %%xmm7, %%"out_reg1" \n\t"\
 +             "punpcklbw %%xmm7, %%"out_reg2" \n\t"\
 +             "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\
 +             "movq "s_offset"+8(%%"REG_S"), %%xmm4 \n\t"\
 +             "punpcklbw %%xmm7, %%xmm0       \n\t"\
 +             "punpcklbw %%xmm7, %%xmm4       \n\t"\
 +             "pmullw %%xmm0, %%"out_reg1"    \n\t"\
 +             "pmullw %%xmm4, %%"out_reg2"    \n\t"
 +
 +#define snow_inner_add_yblock_sse2_accum_8(ptr_offset, s_offset) \
 +             snow_inner_add_yblock_sse2_start_8("xmm2", "xmm6", ptr_offset, s_offset)\
 +             "paddusw %%xmm2, %%xmm1         \n\t"\
 +             "paddusw %%xmm6, %%xmm5         \n\t"
 +
 +#define snow_inner_add_yblock_sse2_accum_16(ptr_offset, s_offset) \
 +             snow_inner_add_yblock_sse2_start_16("xmm2", "xmm6", ptr_offset, s_offset)\
 +             "paddusw %%xmm2, %%xmm1         \n\t"\
 +             "paddusw %%xmm6, %%xmm5         \n\t"
 +
 +#define snow_inner_add_yblock_sse2_end_common1\
 +             "add $32, %%"REG_S"             \n\t"\
 +             "add %%"REG_c", %0              \n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\
 +             "add %%"REG_c", (%%"REG_a")     \n\t"
 +
 +#define snow_inner_add_yblock_sse2_end_common2\
 +             "jnz 1b                         \n\t"\
 +             :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
 +             :\
 +             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"(b_h),"m"(src_stride):\
 +             XMM_CLOBBERS("%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7", )\
 +             "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
 +
 +#define snow_inner_add_yblock_sse2_end_8\
 +             "sal $1, %%"REG_c"              \n\t"\
 +             "add"OPSIZE" $"PTR_SIZE"*2, %1  \n\t"\
 +             snow_inner_add_yblock_sse2_end_common1\
 +             "sar $1, %%"REG_c"              \n\t"\
 +             "sub $2, %2                     \n\t"\
 +             snow_inner_add_yblock_sse2_end_common2
 +
 +#define snow_inner_add_yblock_sse2_end_16\
 +             "add"OPSIZE" $"PTR_SIZE"*1, %1  \n\t"\
 +             snow_inner_add_yblock_sse2_end_common1\
 +             "dec %2                         \n\t"\
 +             snow_inner_add_yblock_sse2_end_common2
 +
 +static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
 +                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +snow_inner_add_yblock_sse2_header
 +snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0")
 +snow_inner_add_yblock_sse2_accum_8("2", "8")
 +snow_inner_add_yblock_sse2_accum_8("1", "128")
 +snow_inner_add_yblock_sse2_accum_8("0", "136")
 +
 +             "mov %0, %%"REG_d"              \n\t"
 +             "movdqa (%%"REG_D"), %%xmm0     \n\t"
 +             "movdqa %%xmm1, %%xmm2          \n\t"
 +
 +             "punpckhwd %%xmm7, %%xmm1       \n\t"
 +             "punpcklwd %%xmm7, %%xmm2       \n\t"
 +             "paddd %%xmm2, %%xmm0           \n\t"
 +             "movdqa 16(%%"REG_D"), %%xmm2   \n\t"
 +             "paddd %%xmm1, %%xmm2           \n\t"
 +             "paddd %%xmm3, %%xmm0           \n\t"
 +             "paddd %%xmm3, %%xmm2           \n\t"
 +
 +             "mov %1, %%"REG_D"              \n\t"
 +             "mov "PTR_SIZE"(%%"REG_D"), %%"REG_D";\n\t"
 +             "add %3, %%"REG_D"              \n\t"
 +
 +             "movdqa (%%"REG_D"), %%xmm4     \n\t"
 +             "movdqa %%xmm5, %%xmm6          \n\t"
 +             "punpckhwd %%xmm7, %%xmm5       \n\t"
 +             "punpcklwd %%xmm7, %%xmm6       \n\t"
 +             "paddd %%xmm6, %%xmm4           \n\t"
 +             "movdqa 16(%%"REG_D"), %%xmm6   \n\t"
 +             "paddd %%xmm5, %%xmm6           \n\t"
 +             "paddd %%xmm3, %%xmm4           \n\t"
 +             "paddd %%xmm3, %%xmm6           \n\t"
 +
 +             "psrad $8, %%xmm0               \n\t" /* FRAC_BITS. */
 +             "psrad $8, %%xmm2               \n\t" /* FRAC_BITS. */
 +             "packssdw %%xmm2, %%xmm0        \n\t"
 +             "packuswb %%xmm7, %%xmm0        \n\t"
 +             "movq %%xmm0, (%%"REG_d")       \n\t"
 +
 +             "psrad $8, %%xmm4               \n\t" /* FRAC_BITS. */
 +             "psrad $8, %%xmm6               \n\t" /* FRAC_BITS. */
 +             "packssdw %%xmm6, %%xmm4        \n\t"
 +             "packuswb %%xmm7, %%xmm4        \n\t"
 +             "movq %%xmm4, (%%"REG_d",%%"REG_c");\n\t"
 +snow_inner_add_yblock_sse2_end_8
 +}
 +
 +static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
 +                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +snow_inner_add_yblock_sse2_header
 +snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0")
 +snow_inner_add_yblock_sse2_accum_16("2", "16")
 +snow_inner_add_yblock_sse2_accum_16("1", "512")
 +snow_inner_add_yblock_sse2_accum_16("0", "528")
 +
 +             "mov %0, %%"REG_d"              \n\t"
 +             "psrlw $4, %%xmm1               \n\t"
 +             "psrlw $4, %%xmm5               \n\t"
 +             "paddw   (%%"REG_D"), %%xmm1    \n\t"
 +             "paddw 16(%%"REG_D"), %%xmm5    \n\t"
 +             "paddw %%xmm3, %%xmm1           \n\t"
 +             "paddw %%xmm3, %%xmm5           \n\t"
 +             "psraw $4, %%xmm1               \n\t" /* FRAC_BITS. */
 +             "psraw $4, %%xmm5               \n\t" /* FRAC_BITS. */
 +             "packuswb %%xmm5, %%xmm1        \n\t"
 +
 +             "movdqu %%xmm1, (%%"REG_d")       \n\t"
 +
 +snow_inner_add_yblock_sse2_end_16
 +}
 +
 +#define snow_inner_add_yblock_mmx_header \
 +    IDWTELEM * * dst_array = sb->line + src_y;\
 +    x86_reg tmp;\
 +    __asm__ volatile(\
 +             "mov  %7, %%"REG_c"             \n\t"\
 +             "mov  %6, %2                    \n\t"\
 +             "mov  %4, %%"REG_S"             \n\t"\
 +             "pxor %%mm7, %%mm7              \n\t" /* 0 */\
 +             "pcmpeqd %%mm3, %%mm3           \n\t"\
 +             "psllw $15, %%mm3               \n\t"\
 +             "psrlw $12, %%mm3               \n\t" /* FRAC_BITS >> 1 */\
 +             "1:                             \n\t"\
 +             "mov %1, %%"REG_D"              \n\t"\
 +             "mov (%%"REG_D"), %%"REG_D"     \n\t"\
 +             "add %3, %%"REG_D"              \n\t"
 +
 +#define snow_inner_add_yblock_mmx_start(out_reg1, out_reg2, ptr_offset, s_offset, d_offset)\
 +             "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\
 +             "movd "d_offset"(%%"REG_d"), %%"out_reg1" \n\t"\
 +             "movd "d_offset"+4(%%"REG_d"), %%"out_reg2" \n\t"\
 +             "punpcklbw %%mm7, %%"out_reg1" \n\t"\
 +             "punpcklbw %%mm7, %%"out_reg2" \n\t"\
 +             "movd "s_offset"(%%"REG_S"), %%mm0 \n\t"\
 +             "movd "s_offset"+4(%%"REG_S"), %%mm4 \n\t"\
 +             "punpcklbw %%mm7, %%mm0       \n\t"\
 +             "punpcklbw %%mm7, %%mm4       \n\t"\
 +             "pmullw %%mm0, %%"out_reg1"    \n\t"\
 +             "pmullw %%mm4, %%"out_reg2"    \n\t"
 +
 +#define snow_inner_add_yblock_mmx_accum(ptr_offset, s_offset, d_offset) \
 +             snow_inner_add_yblock_mmx_start("mm2", "mm6", ptr_offset, s_offset, d_offset)\
 +             "paddusw %%mm2, %%mm1         \n\t"\
 +             "paddusw %%mm6, %%mm5         \n\t"
 +
 +#define snow_inner_add_yblock_mmx_mix(read_offset, write_offset)\
 +             "mov %0, %%"REG_d"              \n\t"\
 +             "psrlw $4, %%mm1                \n\t"\
 +             "psrlw $4, %%mm5                \n\t"\
 +             "paddw "read_offset"(%%"REG_D"), %%mm1 \n\t"\
 +             "paddw "read_offset"+8(%%"REG_D"), %%mm5 \n\t"\
 +             "paddw %%mm3, %%mm1             \n\t"\
 +             "paddw %%mm3, %%mm5             \n\t"\
 +             "psraw $4, %%mm1                \n\t"\
 +             "psraw $4, %%mm5                \n\t"\
 +             "packuswb %%mm5, %%mm1          \n\t"\
 +             "movq %%mm1, "write_offset"(%%"REG_d") \n\t"
 +
 +#define snow_inner_add_yblock_mmx_end(s_step)\
 +             "add $"s_step", %%"REG_S"             \n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\
 +             "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\
 +             "add %%"REG_c", (%%"REG_a")     \n\t"\
 +             "add"OPSIZE " $"PTR_SIZE"*1, %1 \n\t"\
 +             "add %%"REG_c", %0              \n\t"\
 +             "dec %2                         \n\t"\
 +             "jnz 1b                         \n\t"\
 +             :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\
 +             :\
 +             "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"(b_h),"m"(src_stride):\
 +             "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d"");
 +
 +static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
 +                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +snow_inner_add_yblock_mmx_header
 +snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
 +snow_inner_add_yblock_mmx_accum("2", "8", "0")
 +snow_inner_add_yblock_mmx_accum("1", "128", "0")
 +snow_inner_add_yblock_mmx_accum("0", "136", "0")
 +snow_inner_add_yblock_mmx_mix("0", "0")
 +snow_inner_add_yblock_mmx_end("16")
 +}
 +
 +static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h,
 +                      int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +snow_inner_add_yblock_mmx_header
 +snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0")
 +snow_inner_add_yblock_mmx_accum("2", "16", "0")
 +snow_inner_add_yblock_mmx_accum("1", "512", "0")
 +snow_inner_add_yblock_mmx_accum("0", "528", "0")
 +snow_inner_add_yblock_mmx_mix("0", "0")
 +
 +snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "8", "8")
 +snow_inner_add_yblock_mmx_accum("2", "24", "8")
 +snow_inner_add_yblock_mmx_accum("1", "520", "8")
 +snow_inner_add_yblock_mmx_accum("0", "536", "8")
 +snow_inner_add_yblock_mmx_mix("16", "8")
 +snow_inner_add_yblock_mmx_end("32")
 +}
 +
 +static void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h,
 +                           int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +
 +    if (b_w == 16)
 +        inner_add_yblock_bw_16_obmc_32_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +    else if (b_w == 8 && obmc_stride == 16) {
 +        if (!(b_h & 1))
 +            inner_add_yblock_bw_8_obmc_16_bh_even_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +        else
 +            inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +    } else
 +         ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +}
 +
 +static void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h,
 +                          int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){
 +    if (b_w == 16)
 +        inner_add_yblock_bw_16_obmc_32_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +    else if (b_w == 8 && obmc_stride == 16)
 +        inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +    else
 +        ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8);
 +}
 +#endif /* HAVE_6REGS */
 +
 +#endif /* HAVE_INLINE_ASM */
 +
 +void ff_dwt_init_x86(SnowDWTContext *c)
 +{
 +#if HAVE_INLINE_ASM
 +    int mm_flags = av_get_cpu_flags();
 +
 +    if (mm_flags & AV_CPU_FLAG_MMX) {
 +        if(mm_flags & AV_CPU_FLAG_SSE2 & 0){
 +            c->horizontal_compose97i = ff_snow_horizontal_compose97i_sse2;
 +#if HAVE_7REGS
 +            c->vertical_compose97i = ff_snow_vertical_compose97i_sse2;
 +#endif
 +#if HAVE_6REGS
 +            c->inner_add_yblock = ff_snow_inner_add_yblock_sse2;
 +#endif
 +        }
 +        else{
 +            if (mm_flags & AV_CPU_FLAG_MMXEXT) {
 +            c->horizontal_compose97i = ff_snow_horizontal_compose97i_mmx;
 +#if HAVE_7REGS
 +            c->vertical_compose97i = ff_snow_vertical_compose97i_mmx;
 +#endif
 +            }
 +#if HAVE_6REGS
 +            c->inner_add_yblock = ff_snow_inner_add_yblock_mmx;
 +#endif
 +        }
 +    }
 +#endif /* HAVE_INLINE_ASM */
 +}