1 ;******************************************************************************
2 ;* x86-optimized input routines; does shuffling of packed
3 ;* YUV formats into individual planes, and converts RGB
4 ;* into YUV planes also.
5 ;* Copyright (c) 2012 Ronald S. Bultje <rsbultje@gmail.com>
7 ;* This file is part of FFmpeg.
9 ;* FFmpeg is free software; you can redistribute it and/or
10 ;* modify it under the terms of the GNU Lesser General Public
11 ;* License as published by the Free Software Foundation; either
12 ;* version 2.1 of the License, or (at your option) any later version.
14 ;* FFmpeg is distributed in the hope that it will be useful,
15 ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 ;* Lesser General Public License for more details.
19 ;* You should have received a copy of the GNU Lesser General Public
20 ;* License along with FFmpeg; if not, write to the Free Software
21 ;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
22 ;******************************************************************************
24 %include "libavutil/x86/x86util.asm"
38 rgb_Yrnd: times 4 dd 0x80100 ; 16.5 << 15
39 rgb_UVrnd: times 4 dd 0x400100 ; 128.5 << 15
40 %define bgr_Ycoeff_12x4 16*4 + 16* 0 + tableq
41 %define bgr_Ycoeff_3x56 16*4 + 16* 1 + tableq
42 %define rgb_Ycoeff_12x4 16*4 + 16* 2 + tableq
43 %define rgb_Ycoeff_3x56 16*4 + 16* 3 + tableq
44 %define bgr_Ucoeff_12x4 16*4 + 16* 4 + tableq
45 %define bgr_Ucoeff_3x56 16*4 + 16* 5 + tableq
46 %define rgb_Ucoeff_12x4 16*4 + 16* 6 + tableq
47 %define rgb_Ucoeff_3x56 16*4 + 16* 7 + tableq
48 %define bgr_Vcoeff_12x4 16*4 + 16* 8 + tableq
49 %define bgr_Vcoeff_3x56 16*4 + 16* 9 + tableq
50 %define rgb_Vcoeff_12x4 16*4 + 16*10 + tableq
51 %define rgb_Vcoeff_3x56 16*4 + 16*11 + tableq
53 %define rgba_Ycoeff_rb 16*4 + 16*12 + tableq
54 %define rgba_Ycoeff_br 16*4 + 16*13 + tableq
55 %define rgba_Ycoeff_ga 16*4 + 16*14 + tableq
56 %define rgba_Ycoeff_ag 16*4 + 16*15 + tableq
57 %define rgba_Ucoeff_rb 16*4 + 16*16 + tableq
58 %define rgba_Ucoeff_br 16*4 + 16*17 + tableq
59 %define rgba_Ucoeff_ga 16*4 + 16*18 + tableq
60 %define rgba_Ucoeff_ag 16*4 + 16*19 + tableq
61 %define rgba_Vcoeff_rb 16*4 + 16*20 + tableq
62 %define rgba_Vcoeff_br 16*4 + 16*21 + tableq
63 %define rgba_Vcoeff_ga 16*4 + 16*22 + tableq
64 %define rgba_Vcoeff_ag 16*4 + 16*23 + tableq
66 ; bgr_Ycoeff_12x4: times 2 dw BY, GY, 0, BY
67 ; bgr_Ycoeff_3x56: times 2 dw RY, 0, GY, RY
68 ; rgb_Ycoeff_12x4: times 2 dw RY, GY, 0, RY
69 ; rgb_Ycoeff_3x56: times 2 dw BY, 0, GY, BY
70 ; bgr_Ucoeff_12x4: times 2 dw BU, GU, 0, BU
71 ; bgr_Ucoeff_3x56: times 2 dw RU, 0, GU, RU
72 ; rgb_Ucoeff_12x4: times 2 dw RU, GU, 0, RU
73 ; rgb_Ucoeff_3x56: times 2 dw BU, 0, GU, BU
74 ; bgr_Vcoeff_12x4: times 2 dw BV, GV, 0, BV
75 ; bgr_Vcoeff_3x56: times 2 dw RV, 0, GV, RV
76 ; rgb_Vcoeff_12x4: times 2 dw RV, GV, 0, RV
77 ; rgb_Vcoeff_3x56: times 2 dw BV, 0, GV, BV
79 ; rgba_Ycoeff_rb: times 4 dw RY, BY
80 ; rgba_Ycoeff_br: times 4 dw BY, RY
81 ; rgba_Ycoeff_ga: times 4 dw GY, 0
82 ; rgba_Ycoeff_ag: times 4 dw 0, GY
83 ; rgba_Ucoeff_rb: times 4 dw RU, BU
84 ; rgba_Ucoeff_br: times 4 dw BU, RU
85 ; rgba_Ucoeff_ga: times 4 dw GU, 0
86 ; rgba_Ucoeff_ag: times 4 dw 0, GU
87 ; rgba_Vcoeff_rb: times 4 dw RV, BV
88 ; rgba_Vcoeff_br: times 4 dw BV, RV
89 ; rgba_Vcoeff_ga: times 4 dw GV, 0
90 ; rgba_Vcoeff_ag: times 4 dw 0, GV
92 shuf_rgb_12x4: db 0, 0x80, 1, 0x80, 2, 0x80, 3, 0x80, \
93 6, 0x80, 7, 0x80, 8, 0x80, 9, 0x80
94 shuf_rgb_3x56: db 2, 0x80, 3, 0x80, 4, 0x80, 5, 0x80, \
95 8, 0x80, 9, 0x80, 10, 0x80, 11, 0x80
99 ;-----------------------------------------------------------------------------
102 ; void <fmt>ToY_<opt>(uint8_t *dst, const uint8_t *src, int w);
104 ; void <fmt>toUV_<opt>(uint8_t *dstU, uint8_t *dstV, const uint8_t *src,
105 ; const uint8_t *unused, int w);
106 ;-----------------------------------------------------------------------------
108 ; %1 = nr. of XMM registers
110 %macro RGB24_TO_Y_FN 2-3
111 cglobal %2 %+ 24ToY, 6, 6, %1, dst, src, u1, u2, w, table
113 mova m5, [%2_Ycoeff_12x4]
114 mova m6, [%2_Ycoeff_3x56]
118 mova m8, [%2_Ycoeff_12x4]
119 mova m9, [%2_Ycoeff_3x56]
122 %else ; x86-32 && mmsize == 16
123 %define coeff1 [%2_Ycoeff_12x4]
124 %define coeff2 [%2_Ycoeff_3x56]
125 %endif ; x86-32/64 && mmsize == 8/16
126 %if (ARCH_X86_64 || mmsize == 8) && %0 == 3
127 jmp mangle(private_prefix %+ _ %+ %3 %+ 24ToY %+ SUFFIX).body
128 %else ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
131 mova m7, [shuf_rgb_12x4]
134 mova m10, [shuf_rgb_3x56]
135 %define shuf_rgb2 m10
137 %define shuf_rgb2 [shuf_rgb_3x56]
139 %endif ; cpuflag(ssse3)
146 %if notcpuflag(ssse3)
148 %endif ; !cpuflag(ssse3)
152 movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
153 movu m2, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
154 pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
155 pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
156 pshufb m3, m2, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
157 pshufb m2, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
158 %else ; !cpuflag(ssse3)
159 movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
160 movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
161 movd m2, [srcq+6] ; (byte) { B2, G2, R2, B3 }
162 movd m3, [srcq+8] ; (byte) { R2, B3, G3, R3 }
163 %if mmsize == 16 ; i.e. sse2
164 punpckldq m0, m2 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
165 punpckldq m1, m3 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
166 movd m2, [srcq+12] ; (byte) { B4, G4, R4, B5 }
167 movd m3, [srcq+14] ; (byte) { R4, B5, G5, R5 }
168 movd m5, [srcq+18] ; (byte) { B6, G6, R6, B7 }
169 movd m6, [srcq+20] ; (byte) { R6, B7, G7, R7 }
170 punpckldq m2, m5 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
171 punpckldq m3, m6 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
172 %endif ; mmsize == 16
173 punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
174 punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
175 punpcklbw m2, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
176 punpcklbw m3, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
177 %endif ; cpuflag(ssse3)
178 add srcq, 3 * mmsize / 2
179 pmaddwd m0, coeff1 ; (dword) { B0*BY + G0*GY, B1*BY, B2*BY + G2*GY, B3*BY }
180 pmaddwd m1, coeff2 ; (dword) { R0*RY, G1+GY + R1*RY, R2*RY, G3+GY + R3*RY }
181 pmaddwd m2, coeff1 ; (dword) { B4*BY + G4*GY, B5*BY, B6*BY + G6*GY, B7*BY }
182 pmaddwd m3, coeff2 ; (dword) { R4*RY, G5+GY + R5*RY, R6*RY, G7+GY + R7*RY }
183 paddd m0, m1 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[0-3]
184 paddd m2, m3 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[4-7]
185 paddd m0, m4 ; += rgb_Yrnd, i.e. (dword) { Y[0-3] }
186 paddd m2, m4 ; += rgb_Yrnd, i.e. (dword) { Y[4-7] }
189 packssdw m0, m2 ; (word) { Y[0-7] }
194 %endif ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
197 ; %1 = nr. of XMM registers
199 %macro RGB24_TO_UV_FN 2-3
200 cglobal %2 %+ 24ToUV, 7, 7, %1, dstU, dstV, u1, src, u2, w, table
202 mova m8, [%2_Ucoeff_12x4]
203 mova m9, [%2_Ucoeff_3x56]
204 mova m10, [%2_Vcoeff_12x4]
205 mova m11, [%2_Vcoeff_3x56]
211 %define coeffU1 [%2_Ucoeff_12x4]
212 %define coeffU2 [%2_Ucoeff_3x56]
213 %define coeffV1 [%2_Vcoeff_12x4]
214 %define coeffV2 [%2_Vcoeff_3x56]
216 %if ARCH_X86_64 && %0 == 3
217 jmp mangle(private_prefix %+ _ %+ %3 %+ 24ToUV %+ SUFFIX).body
218 %else ; ARCH_X86_64 && %0 == 3
221 mova m7, [shuf_rgb_12x4]
224 mova m12, [shuf_rgb_3x56]
225 %define shuf_rgb2 m12
227 %define shuf_rgb2 [shuf_rgb_3x56]
229 %endif ; cpuflag(ssse3)
240 %if notcpuflag(ssse3)
245 movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
246 movu m4, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
247 pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
248 pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
249 %else ; !cpuflag(ssse3)
250 movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
251 movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
252 movd m4, [srcq+6] ; (byte) { B2, G2, R2, B3 }
253 movd m5, [srcq+8] ; (byte) { R2, B3, G3, R3 }
255 punpckldq m0, m4 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
256 punpckldq m1, m5 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
257 movd m4, [srcq+12] ; (byte) { B4, G4, R4, B5 }
258 movd m5, [srcq+14] ; (byte) { R4, B5, G5, R5 }
259 %endif ; mmsize == 16
260 punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
261 punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
262 %endif ; cpuflag(ssse3)
263 pmaddwd m2, m0, coeffV1 ; (dword) { B0*BV + G0*GV, B1*BV, B2*BV + G2*GV, B3*BV }
264 pmaddwd m3, m1, coeffV2 ; (dword) { R0*BV, G1*GV + R1*BV, R2*BV, G3*GV + R3*BV }
265 pmaddwd m0, coeffU1 ; (dword) { B0*BU + G0*GU, B1*BU, B2*BU + G2*GU, B3*BU }
266 pmaddwd m1, coeffU2 ; (dword) { R0*BU, G1*GU + R1*BU, R2*BU, G3*GU + R3*BU }
267 paddd m0, m1 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[0-3]
268 paddd m2, m3 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[0-3]
270 pshufb m5, m4, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
271 pshufb m4, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
272 %else ; !cpuflag(ssse3)
274 movd m1, [srcq+18] ; (byte) { B6, G6, R6, B7 }
275 movd m3, [srcq+20] ; (byte) { R6, B7, G7, R7 }
276 punpckldq m4, m1 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
277 punpckldq m5, m3 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
278 %endif ; mmsize == 16 && !cpuflag(ssse3)
279 punpcklbw m4, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
280 punpcklbw m5, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
281 %endif ; cpuflag(ssse3)
282 add srcq, 3 * mmsize / 2
283 pmaddwd m1, m4, coeffU1 ; (dword) { B4*BU + G4*GU, B5*BU, B6*BU + G6*GU, B7*BU }
284 pmaddwd m3, m5, coeffU2 ; (dword) { R4*BU, G5*GU + R5*BU, R6*BU, G7*GU + R7*BU }
285 pmaddwd m4, coeffV1 ; (dword) { B4*BV + G4*GV, B5*BV, B6*BV + G6*GV, B7*BV }
286 pmaddwd m5, coeffV2 ; (dword) { R4*BV, G5*GV + R5*BV, R6*BV, G7*GV + R7*BV }
287 paddd m1, m3 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[4-7]
288 paddd m4, m5 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[4-7]
289 paddd m0, m6 ; += rgb_UVrnd, i.e. (dword) { U[0-3] }
290 paddd m2, m6 ; += rgb_UVrnd, i.e. (dword) { V[0-3] }
291 paddd m1, m6 ; += rgb_UVrnd, i.e. (dword) { U[4-7] }
292 paddd m4, m6 ; += rgb_UVrnd, i.e. (dword) { V[4-7] }
297 packssdw m0, m1 ; (word) { U[0-7] }
298 packssdw m2, m4 ; (word) { V[0-7] }
305 %endif ; mmsize == 8/16
309 %endif ; ARCH_X86_64 && %0 == 3
312 ; %1 = nr. of XMM registers for rgb-to-Y func
313 ; %2 = nr. of XMM registers for rgb-to-UV func
315 RGB24_TO_Y_FN %1, rgb
316 RGB24_TO_Y_FN %1, bgr, rgb
317 RGB24_TO_UV_FN %2, rgb
318 RGB24_TO_UV_FN %2, bgr, rgb
332 %if HAVE_AVX_EXTERNAL
337 ; %1 = nr. of XMM registers
338 ; %2-5 = rgba, bgra, argb or abgr (in individual characters)
339 %macro RGB32_TO_Y_FN 5-6
340 cglobal %2%3%4%5 %+ ToY, 6, 6, %1, dst, src, u1, u2, w, table
341 mova m5, [rgba_Ycoeff_%2%4]
342 mova m6, [rgba_Ycoeff_%3%5]
344 jmp mangle(private_prefix %+ _ %+ %6 %+ ToY %+ SUFFIX).body
350 lea srcq, [srcq+wq*4]
356 psrlw m7, 8 ; (word) { 0x00ff } x4
358 ; FIXME check alignment and use mova
359 movu m0, [srcq+wq*2+0] ; (byte) { Bx, Gx, Rx, xx }[0-3]
360 movu m2, [srcq+wq*2+mmsize] ; (byte) { Bx, Gx, Rx, xx }[4-7]
361 DEINTB 1, 0, 3, 2, 7 ; (word) { Gx, xx (m0/m2) or Bx, Rx (m1/m3) }[0-3]/[4-7]
362 pmaddwd m1, m5 ; (dword) { Bx*BY + Rx*RY }[0-3]
363 pmaddwd m0, m6 ; (dword) { Gx*GY }[0-3]
364 pmaddwd m3, m5 ; (dword) { Bx*BY + Rx*RY }[4-7]
365 pmaddwd m2, m6 ; (dword) { Gx*GY }[4-7]
366 paddd m0, m4 ; += rgb_Yrnd
367 paddd m2, m4 ; += rgb_Yrnd
368 paddd m0, m1 ; (dword) { Y[0-3] }
369 paddd m2, m3 ; (dword) { Y[4-7] }
372 packssdw m0, m2 ; (word) { Y[0-7] }
380 ; %1 = nr. of XMM registers
381 ; %2-5 = rgba, bgra, argb or abgr (in individual characters)
382 %macro RGB32_TO_UV_FN 5-6
383 cglobal %2%3%4%5 %+ ToUV, 7, 7, %1, dstU, dstV, u1, src, u2, w, table
385 mova m8, [rgba_Ucoeff_%2%4]
386 mova m9, [rgba_Ucoeff_%3%5]
387 mova m10, [rgba_Vcoeff_%2%4]
388 mova m11, [rgba_Vcoeff_%3%5]
394 %define coeffU1 [rgba_Ucoeff_%2%4]
395 %define coeffU2 [rgba_Ucoeff_%3%5]
396 %define coeffV1 [rgba_Vcoeff_%2%4]
397 %define coeffV2 [rgba_Vcoeff_%3%5]
399 %if ARCH_X86_64 && %0 == 6
400 jmp mangle(private_prefix %+ _ %+ %6 %+ ToUV %+ SUFFIX).body
401 %else ; ARCH_X86_64 && %0 == 6
412 lea srcq, [srcq+wq*2]
415 psrlw m7, 8 ; (word) { 0x00ff } x4
418 ; FIXME check alignment and use mova
419 movu m0, [srcq+wq*2+0] ; (byte) { Bx, Gx, Rx, xx }[0-3]
420 movu m4, [srcq+wq*2+mmsize] ; (byte) { Bx, Gx, Rx, xx }[4-7]
421 DEINTB 1, 0, 5, 4, 7 ; (word) { Gx, xx (m0/m4) or Bx, Rx (m1/m5) }[0-3]/[4-7]
422 pmaddwd m3, m1, coeffV1 ; (dword) { Bx*BV + Rx*RV }[0-3]
423 pmaddwd m2, m0, coeffV2 ; (dword) { Gx*GV }[0-3]
424 pmaddwd m1, coeffU1 ; (dword) { Bx*BU + Rx*RU }[0-3]
425 pmaddwd m0, coeffU2 ; (dword) { Gx*GU }[0-3]
426 paddd m3, m6 ; += rgb_UVrnd
427 paddd m1, m6 ; += rgb_UVrnd
428 paddd m2, m3 ; (dword) { V[0-3] }
429 paddd m0, m1 ; (dword) { U[0-3] }
430 pmaddwd m3, m5, coeffV1 ; (dword) { Bx*BV + Rx*RV }[4-7]
431 pmaddwd m1, m4, coeffV2 ; (dword) { Gx*GV }[4-7]
432 pmaddwd m5, coeffU1 ; (dword) { Bx*BU + Rx*RU }[4-7]
433 pmaddwd m4, coeffU2 ; (dword) { Gx*GU }[4-7]
434 paddd m3, m6 ; += rgb_UVrnd
435 paddd m5, m6 ; += rgb_UVrnd
437 paddd m1, m3 ; (dword) { V[4-7] }
438 paddd m4, m5 ; (dword) { U[4-7] }
442 packssdw m0, m4 ; (word) { U[0-7] }
443 packssdw m2, m1 ; (word) { V[0-7] }
450 %endif ; mmsize == 8/16
455 add srcq , 2*mmsize - 2
456 add dstUq, mmsize - 1
457 add dstVq, mmsize - 1
459 movd m0, [srcq+wq*2] ; (byte) { Bx, Gx, Rx, xx }[0-3]
460 DEINTB 1, 0, 5, 4, 7 ; (word) { Gx, xx (m0/m4) or Bx, Rx (m1/m5) }[0-3]/[4-7]
461 pmaddwd m3, m1, coeffV1 ; (dword) { Bx*BV + Rx*RV }[0-3]
462 pmaddwd m2, m0, coeffV2 ; (dword) { Gx*GV }[0-3]
463 pmaddwd m1, coeffU1 ; (dword) { Bx*BU + Rx*RU }[0-3]
464 pmaddwd m0, coeffU2 ; (dword) { Gx*GU }[0-3]
465 paddd m3, m6 ; += rgb_UVrnd
466 paddd m1, m6 ; += rgb_UVrnd
467 paddd m2, m3 ; (dword) { V[0-3] }
468 paddd m0, m1 ; (dword) { U[0-3] }
471 packssdw m0, m0 ; (word) { U[0-7] }
472 packssdw m2, m2 ; (word) { V[0-7] }
479 %endif ; ARCH_X86_64 && %0 == 3
482 ; %1 = nr. of XMM registers for rgb-to-Y func
483 ; %2 = nr. of XMM registers for rgb-to-UV func
485 RGB32_TO_Y_FN %1, r, g, b, a
486 RGB32_TO_Y_FN %1, b, g, r, a, rgba
487 RGB32_TO_Y_FN %1, a, r, g, b, rgba
488 RGB32_TO_Y_FN %1, a, b, g, r, rgba
490 RGB32_TO_UV_FN %2, r, g, b, a
491 RGB32_TO_UV_FN %2, b, g, r, a, rgba
492 RGB32_TO_UV_FN %2, a, r, g, b, rgba
493 RGB32_TO_UV_FN %2, a, b, g, r, rgba
504 %if HAVE_AVX_EXTERNAL
509 ;-----------------------------------------------------------------------------
510 ; YUYV/UYVY/NV12/NV21 packed pixel shuffling.
512 ; void <fmt>ToY_<opt>(uint8_t *dst, const uint8_t *src, int w);
514 ; void <fmt>toUV_<opt>(uint8_t *dstU, uint8_t *dstV, const uint8_t *src,
515 ; const uint8_t *unused, int w);
516 ;-----------------------------------------------------------------------------
518 ; %1 = a (aligned) or u (unaligned)
520 %macro LOOP_YUYV_TO_Y 2
522 mov%1 m0, [srcq+wq*2] ; (byte) { Y0, U0, Y1, V0, ... }
523 mov%1 m1, [srcq+wq*2+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
525 pand m0, m2 ; (word) { Y0, Y1, ..., Y7 }
526 pand m1, m2 ; (word) { Y8, Y9, ..., Y15 }
528 psrlw m0, 8 ; (word) { Y0, Y1, ..., Y7 }
529 psrlw m1, 8 ; (word) { Y8, Y9, ..., Y15 }
531 packuswb m0, m1 ; (byte) { Y0, ..., Y15 }
538 ; %1 = nr. of XMM registers
540 ; %3 = if specified, it means that unaligned and aligned code in loop
541 ; will be the same (i.e. YUYV+AVX), and thus we don't need to
542 ; split the loop in an aligned and unaligned case
543 %macro YUYV_TO_Y_FN 2-3
544 cglobal %2ToY, 5, 5, %1, dst, unused0, unused1, src, w
552 lea srcq, [srcq+wq*2]
554 pcmpeqb m2, m2 ; (byte) { 0xff } x 16
555 psrlw m2, 8 ; (word) { 0x00ff } x 8
567 %endif ; mmsize == 8/16
570 ; %1 = a (aligned) or u (unaligned)
572 %macro LOOP_YUYV_TO_UV 2
575 mov%1 m0, [srcq+wq*4] ; (byte) { Y0, U0, Y1, V0, ... }
576 mov%1 m1, [srcq+wq*4+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
577 psrlw m0, 8 ; (word) { U0, V0, ..., U3, V3 }
578 psrlw m1, 8 ; (word) { U4, V4, ..., U7, V7 }
581 vpand m0, m2, [srcq+wq*4] ; (word) { U0, V0, ..., U3, V3 }
582 vpand m1, m2, [srcq+wq*4+mmsize] ; (word) { U4, V4, ..., U7, V7 }
584 mov%1 m0, [srcq+wq*4] ; (byte) { Y0, U0, Y1, V0, ... }
585 mov%1 m1, [srcq+wq*4+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
586 pand m0, m2 ; (word) { U0, V0, ..., U3, V3 }
587 pand m1, m2 ; (word) { U4, V4, ..., U7, V7 }
590 packuswb m0, m1 ; (byte) { U0, V0, ..., U7, V7 }
591 pand m1, m0, m2 ; (word) { U0, U1, ..., U7 }
592 psrlw m0, 8 ; (word) { V0, V1, ..., V7 }
594 packuswb m1, m0 ; (byte) { U0, ... U7, V1, ... V7 }
596 movhps [dstVq+wq], m1
598 packuswb m1, m1 ; (byte) { U0, ... U3 }
599 packuswb m0, m0 ; (byte) { V0, ... V3 }
602 %endif ; mmsize == 8/16
608 ; %1 = nr. of XMM registers
610 ; %3 = if specified, it means that unaligned and aligned code in loop
611 ; will be the same (i.e. UYVY+AVX), and thus we don't need to
612 ; split the loop in an aligned and unaligned case
613 %macro YUYV_TO_UV_FN 2-3
614 cglobal %2ToUV, 4, 5, %1, dstU, dstV, unused, src, w
622 %if mmsize == 16 && %0 == 2
625 lea srcq, [srcq+wq*4]
626 pcmpeqb m2, m2 ; (byte) { 0xff } x 16
627 psrlw m2, 8 ; (word) { 0x00ff } x 8
628 ; NOTE: if uyvy+avx, u/a are identical
629 %if mmsize == 16 && %0 == 2
632 LOOP_YUYV_TO_UV a, %2
635 LOOP_YUYV_TO_UV u, %2
638 LOOP_YUYV_TO_UV a, %2
639 %endif ; mmsize == 8/16
642 ; %1 = a (aligned) or u (unaligned)
644 %macro LOOP_NVXX_TO_UV 2
646 mov%1 m0, [srcq+wq*2] ; (byte) { U0, V0, U1, V1, ... }
647 mov%1 m1, [srcq+wq*2+mmsize] ; (byte) { U8, V8, U9, V9, ... }
648 pand m2, m0, m5 ; (word) { U0, U1, ..., U7 }
649 pand m3, m1, m5 ; (word) { U8, U9, ..., U15 }
650 psrlw m0, 8 ; (word) { V0, V1, ..., V7 }
651 psrlw m1, 8 ; (word) { V8, V9, ..., V15 }
652 packuswb m2, m3 ; (byte) { U0, ..., U15 }
653 packuswb m0, m1 ; (byte) { V0, ..., V15 }
666 ; %1 = nr. of XMM registers
668 %macro NVXX_TO_UV_FN 2
669 cglobal %2ToUV, 4, 5, %1, dstU, dstV, unused, src, w
680 lea srcq, [srcq+wq*2]
681 pcmpeqb m5, m5 ; (byte) { 0xff } x 16
682 psrlw m5, 8 ; (word) { 0x00ff } x 8
686 LOOP_NVXX_TO_UV a, %2
689 LOOP_NVXX_TO_UV u, %2
692 LOOP_NVXX_TO_UV a, %2
693 %endif ; mmsize == 8/16
700 YUYV_TO_UV_FN 0, yuyv
701 YUYV_TO_UV_FN 0, uyvy
702 NVXX_TO_UV_FN 0, nv12
703 NVXX_TO_UV_FN 0, nv21
709 YUYV_TO_UV_FN 3, yuyv
710 YUYV_TO_UV_FN 3, uyvy
711 NVXX_TO_UV_FN 5, nv12
712 NVXX_TO_UV_FN 5, nv21
714 %if HAVE_AVX_EXTERNAL
716 ; in theory, we could write a yuy2-to-y using vpand (i.e. AVX), but
717 ; that's not faster in practice
718 YUYV_TO_UV_FN 3, yuyv
719 YUYV_TO_UV_FN 3, uyvy, 1
720 NVXX_TO_UV_FN 5, nv12
721 NVXX_TO_UV_FN 5, nv21