8b490b62047c5bef197b0a34cf3707a3b973af4d
[ffmpeg.git] / libavcodec / x86 / vc1dsp_mmx.c
1 /*
2  * VC-1 and WMV3 - DSP functions MMX-optimized
3  * Copyright (c) 2007 Christophe GISQUET <christophe.gisquet@free.fr>
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without
8  * restriction, including without limitation the rights to use,
9  * copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following
12  * conditions:
13  *
14  * The above copyright notice and this permission notice shall be
15  * included in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
19  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
21  * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
22  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24  * OTHER DEALINGS IN THE SOFTWARE.
25  */
26
27 #include "libavutil/cpu.h"
28 #include "libavutil/x86/asm.h"
29 #include "libavcodec/dsputil.h"
30 #include "dsputil_mmx.h"
31 #include "libavcodec/vc1dsp.h"
32
33 #if HAVE_INLINE_ASM
34
35 #define OP_PUT(S,D)
36 #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"
37
38 /** Add rounder from mm7 to mm3 and pack result at destination */
39 #define NORMALIZE_MMX(SHIFT)                                    \
40      "paddw     %%mm7, %%mm3           \n\t" /* +bias-r */      \
41      "paddw     %%mm7, %%mm4           \n\t" /* +bias-r */      \
42      "psraw     "SHIFT", %%mm3         \n\t"                    \
43      "psraw     "SHIFT", %%mm4         \n\t"
44
45 #define TRANSFER_DO_PACK(OP)                    \
46      "packuswb  %%mm4, %%mm3           \n\t"    \
47      OP((%2), %%mm3)                            \
48      "movq      %%mm3, (%2)            \n\t"
49
50 #define TRANSFER_DONT_PACK(OP)                  \
51      OP(0(%2), %%mm3)                           \
52      OP(8(%2), %%mm4)                           \
53      "movq      %%mm3, 0(%2)           \n\t"    \
54      "movq      %%mm4, 8(%2)           \n\t"
55
56 /** @see MSPEL_FILTER13_CORE for use as UNPACK macro */
57 #define DO_UNPACK(reg)  "punpcklbw %%mm0, " reg "\n\t"
58 #define DONT_UNPACK(reg)
59
60 /** Compute the rounder 32-r or 8-r and unpacks it to mm7 */
61 #define LOAD_ROUNDER_MMX(ROUND)                 \
62      "movd      "ROUND", %%mm7         \n\t"    \
63      "punpcklwd %%mm7, %%mm7           \n\t"    \
64      "punpckldq %%mm7, %%mm7           \n\t"
65
66 #define SHIFT2_LINE(OFF, R0,R1,R2,R3)           \
67     "paddw     %%mm"#R2", %%mm"#R1"    \n\t"    \
68     "movd      (%0,%3), %%mm"#R0"      \n\t"    \
69     "pmullw    %%mm6, %%mm"#R1"        \n\t"    \
70     "punpcklbw %%mm0, %%mm"#R0"        \n\t"    \
71     "movd      (%0,%2), %%mm"#R3"      \n\t"    \
72     "psubw     %%mm"#R0", %%mm"#R1"    \n\t"    \
73     "punpcklbw %%mm0, %%mm"#R3"        \n\t"    \
74     "paddw     %%mm7, %%mm"#R1"        \n\t"    \
75     "psubw     %%mm"#R3", %%mm"#R1"    \n\t"    \
76     "psraw     %4, %%mm"#R1"           \n\t"    \
77     "movq      %%mm"#R1", "#OFF"(%1)   \n\t"    \
78     "add       %2, %0                  \n\t"
79
80 /** Sacrifying mm6 allows to pipeline loads from src */
81 static void vc1_put_ver_16b_shift2_mmx(int16_t *dst,
82                                        const uint8_t *src, x86_reg stride,
83                                        int rnd, int64_t shift)
84 {
85     __asm__ volatile(
86         "mov       $3, %%"REG_c"           \n\t"
87         LOAD_ROUNDER_MMX("%5")
88         "movq      "MANGLE(ff_pw_9)", %%mm6 \n\t"
89         "1:                                \n\t"
90         "movd      (%0), %%mm2             \n\t"
91         "add       %2, %0                  \n\t"
92         "movd      (%0), %%mm3             \n\t"
93         "punpcklbw %%mm0, %%mm2            \n\t"
94         "punpcklbw %%mm0, %%mm3            \n\t"
95         SHIFT2_LINE(  0, 1, 2, 3, 4)
96         SHIFT2_LINE( 24, 2, 3, 4, 1)
97         SHIFT2_LINE( 48, 3, 4, 1, 2)
98         SHIFT2_LINE( 72, 4, 1, 2, 3)
99         SHIFT2_LINE( 96, 1, 2, 3, 4)
100         SHIFT2_LINE(120, 2, 3, 4, 1)
101         SHIFT2_LINE(144, 3, 4, 1, 2)
102         SHIFT2_LINE(168, 4, 1, 2, 3)
103         "sub       %6, %0                  \n\t"
104         "add       $8, %1                  \n\t"
105         "dec       %%"REG_c"               \n\t"
106         "jnz 1b                            \n\t"
107         : "+r"(src), "+r"(dst)
108         : "r"(stride), "r"(-2*stride),
109           "m"(shift), "m"(rnd), "r"(9*stride-4)
110         : "%"REG_c, "memory"
111     );
112 }
113
114 /**
115  * Data is already unpacked, so some operations can directly be made from
116  * memory.
117  */
118 #define VC1_HOR_16b_SHIFT2(OP, OPNAME)\
119 static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\
120                                              const int16_t *src, int rnd)\
121 {\
122     int h = 8;\
123 \
124     src -= 1;\
125     rnd -= (-1+9+9-1)*1024; /* Add -1024 bias */\
126     __asm__ volatile(\
127         LOAD_ROUNDER_MMX("%4")\
128         "movq      "MANGLE(ff_pw_128)", %%mm6\n\t"\
129         "movq      "MANGLE(ff_pw_9)", %%mm5 \n\t"\
130         "1:                                \n\t"\
131         "movq      2*0+0(%1), %%mm1        \n\t"\
132         "movq      2*0+8(%1), %%mm2        \n\t"\
133         "movq      2*1+0(%1), %%mm3        \n\t"\
134         "movq      2*1+8(%1), %%mm4        \n\t"\
135         "paddw     2*3+0(%1), %%mm1        \n\t"\
136         "paddw     2*3+8(%1), %%mm2        \n\t"\
137         "paddw     2*2+0(%1), %%mm3        \n\t"\
138         "paddw     2*2+8(%1), %%mm4        \n\t"\
139         "pmullw    %%mm5, %%mm3            \n\t"\
140         "pmullw    %%mm5, %%mm4            \n\t"\
141         "psubw     %%mm1, %%mm3            \n\t"\
142         "psubw     %%mm2, %%mm4            \n\t"\
143         NORMALIZE_MMX("$7")\
144         /* Remove bias */\
145         "paddw     %%mm6, %%mm3            \n\t"\
146         "paddw     %%mm6, %%mm4            \n\t"\
147         TRANSFER_DO_PACK(OP)\
148         "add       $24, %1                 \n\t"\
149         "add       %3, %2                  \n\t"\
150         "decl      %0                      \n\t"\
151         "jnz 1b                            \n\t"\
152         : "+r"(h), "+r" (src),  "+r" (dst)\
153         : "r"(stride), "m"(rnd)\
154         : "memory"\
155     );\
156 }
157
158 VC1_HOR_16b_SHIFT2(OP_PUT, put_)
159 VC1_HOR_16b_SHIFT2(OP_AVG, avg_)
160
161
162 /**
163  * Purely vertical or horizontal 1/2 shift interpolation.
164  * Sacrify mm6 for *9 factor.
165  */
166 #define VC1_SHIFT2(OP, OPNAME)\
167 static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\
168                                      x86_reg stride, int rnd, x86_reg offset)\
169 {\
170     rnd = 8-rnd;\
171     __asm__ volatile(\
172         "mov       $8, %%"REG_c"           \n\t"\
173         LOAD_ROUNDER_MMX("%5")\
174         "movq      "MANGLE(ff_pw_9)", %%mm6\n\t"\
175         "1:                                \n\t"\
176         "movd      0(%0   ), %%mm3         \n\t"\
177         "movd      4(%0   ), %%mm4         \n\t"\
178         "movd      0(%0,%2), %%mm1         \n\t"\
179         "movd      4(%0,%2), %%mm2         \n\t"\
180         "add       %2, %0                  \n\t"\
181         "punpcklbw %%mm0, %%mm3            \n\t"\
182         "punpcklbw %%mm0, %%mm4            \n\t"\
183         "punpcklbw %%mm0, %%mm1            \n\t"\
184         "punpcklbw %%mm0, %%mm2            \n\t"\
185         "paddw     %%mm1, %%mm3            \n\t"\
186         "paddw     %%mm2, %%mm4            \n\t"\
187         "movd      0(%0,%3), %%mm1         \n\t"\
188         "movd      4(%0,%3), %%mm2         \n\t"\
189         "pmullw    %%mm6, %%mm3            \n\t" /* 0,9,9,0*/\
190         "pmullw    %%mm6, %%mm4            \n\t" /* 0,9,9,0*/\
191         "punpcklbw %%mm0, %%mm1            \n\t"\
192         "punpcklbw %%mm0, %%mm2            \n\t"\
193         "psubw     %%mm1, %%mm3            \n\t" /*-1,9,9,0*/\
194         "psubw     %%mm2, %%mm4            \n\t" /*-1,9,9,0*/\
195         "movd      0(%0,%2), %%mm1         \n\t"\
196         "movd      4(%0,%2), %%mm2         \n\t"\
197         "punpcklbw %%mm0, %%mm1            \n\t"\
198         "punpcklbw %%mm0, %%mm2            \n\t"\
199         "psubw     %%mm1, %%mm3            \n\t" /*-1,9,9,-1*/\
200         "psubw     %%mm2, %%mm4            \n\t" /*-1,9,9,-1*/\
201         NORMALIZE_MMX("$4")\
202         "packuswb  %%mm4, %%mm3            \n\t"\
203         OP((%1), %%mm3)\
204         "movq      %%mm3, (%1)             \n\t"\
205         "add       %6, %0                  \n\t"\
206         "add       %4, %1                  \n\t"\
207         "dec       %%"REG_c"               \n\t"\
208         "jnz 1b                            \n\t"\
209         : "+r"(src),  "+r"(dst)\
210         : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\
211           "g"(stride-offset)\
212         : "%"REG_c, "memory"\
213     );\
214 }
215
216 VC1_SHIFT2(OP_PUT, put_)
217 VC1_SHIFT2(OP_AVG, avg_)
218
219 /**
220  * Core of the 1/4 and 3/4 shift bicubic interpolation.
221  *
222  * @param UNPACK  Macro unpacking arguments from 8 to 16bits (can be empty).
223  * @param MOVQ    "movd 1" or "movq 2", if data read is already unpacked.
224  * @param A1      Address of 1st tap (beware of unpacked/packed).
225  * @param A2      Address of 2nd tap
226  * @param A3      Address of 3rd tap
227  * @param A4      Address of 4th tap
228  */
229 #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4)       \
230      MOVQ "*0+"A1", %%mm1       \n\t"                           \
231      MOVQ "*4+"A1", %%mm2       \n\t"                           \
232      UNPACK("%%mm1")                                            \
233      UNPACK("%%mm2")                                            \
234      "pmullw    "MANGLE(ff_pw_3)", %%mm1\n\t"                   \
235      "pmullw    "MANGLE(ff_pw_3)", %%mm2\n\t"                   \
236      MOVQ "*0+"A2", %%mm3       \n\t"                           \
237      MOVQ "*4+"A2", %%mm4       \n\t"                           \
238      UNPACK("%%mm3")                                            \
239      UNPACK("%%mm4")                                            \
240      "pmullw    %%mm6, %%mm3    \n\t" /* *18 */                 \
241      "pmullw    %%mm6, %%mm4    \n\t" /* *18 */                 \
242      "psubw     %%mm1, %%mm3    \n\t" /* 18,-3 */               \
243      "psubw     %%mm2, %%mm4    \n\t" /* 18,-3 */               \
244      MOVQ "*0+"A4", %%mm1       \n\t"                           \
245      MOVQ "*4+"A4", %%mm2       \n\t"                           \
246      UNPACK("%%mm1")                                            \
247      UNPACK("%%mm2")                                            \
248      "psllw     $2, %%mm1       \n\t" /* 4* */                  \
249      "psllw     $2, %%mm2       \n\t" /* 4* */                  \
250      "psubw     %%mm1, %%mm3    \n\t" /* -4,18,-3 */            \
251      "psubw     %%mm2, %%mm4    \n\t" /* -4,18,-3 */            \
252      MOVQ "*0+"A3", %%mm1       \n\t"                           \
253      MOVQ "*4+"A3", %%mm2       \n\t"                           \
254      UNPACK("%%mm1")                                            \
255      UNPACK("%%mm2")                                            \
256      "pmullw    %%mm5, %%mm1    \n\t" /* *53 */                 \
257      "pmullw    %%mm5, %%mm2    \n\t" /* *53 */                 \
258      "paddw     %%mm1, %%mm3    \n\t" /* 4,53,18,-3 */          \
259      "paddw     %%mm2, %%mm4    \n\t" /* 4,53,18,-3 */
260
261 /**
262  * Macro to build the vertical 16bits version of vc1_put_shift[13].
263  * Here, offset=src_stride. Parameters passed A1 to A4 must use
264  * %3 (src_stride) and %4 (3*src_stride).
265  *
266  * @param  NAME   Either 1 or 3
267  * @see MSPEL_FILTER13_CORE for information on A1->A4
268  */
269 #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4)                    \
270 static void                                                             \
271 vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src,      \
272                                  x86_reg src_stride,                   \
273                                  int rnd, int64_t shift)                \
274 {                                                                       \
275     int h = 8;                                                          \
276     src -= src_stride;                                                  \
277     __asm__ volatile(                                                       \
278         LOAD_ROUNDER_MMX("%5")                                          \
279         "movq      "MANGLE(ff_pw_53)", %%mm5\n\t"                       \
280         "movq      "MANGLE(ff_pw_18)", %%mm6\n\t"                       \
281         ".p2align 3                \n\t"                                \
282         "1:                        \n\t"                                \
283         MSPEL_FILTER13_CORE(DO_UNPACK, "movd  1", A1, A2, A3, A4)       \
284         NORMALIZE_MMX("%6")                                             \
285         TRANSFER_DONT_PACK(OP_PUT)                                      \
286         /* Last 3 (in fact 4) bytes on the line */                      \
287         "movd      8+"A1", %%mm1   \n\t"                                \
288         DO_UNPACK("%%mm1")                                              \
289         "movq      %%mm1, %%mm3    \n\t"                                \
290         "paddw     %%mm1, %%mm1    \n\t"                                \
291         "paddw     %%mm3, %%mm1    \n\t" /* 3* */                       \
292         "movd      8+"A2", %%mm3   \n\t"                                \
293         DO_UNPACK("%%mm3")                                              \
294         "pmullw    %%mm6, %%mm3    \n\t" /* *18 */                      \
295         "psubw     %%mm1, %%mm3    \n\t" /*18,-3 */                     \
296         "movd      8+"A3", %%mm1   \n\t"                                \
297         DO_UNPACK("%%mm1")                                              \
298         "pmullw    %%mm5, %%mm1    \n\t" /* *53 */                      \
299         "paddw     %%mm1, %%mm3    \n\t" /*53,18,-3 */                  \
300         "movd      8+"A4", %%mm1   \n\t"                                \
301         DO_UNPACK("%%mm1")                                              \
302         "psllw     $2, %%mm1       \n\t" /* 4* */                       \
303         "psubw     %%mm1, %%mm3    \n\t"                                \
304         "paddw     %%mm7, %%mm3    \n\t"                                \
305         "psraw     %6, %%mm3       \n\t"                                \
306         "movq      %%mm3, 16(%2)   \n\t"                                \
307         "add       %3, %1          \n\t"                                \
308         "add       $24, %2         \n\t"                                \
309         "decl      %0              \n\t"                                \
310         "jnz 1b                    \n\t"                                \
311         : "+r"(h), "+r" (src),  "+r" (dst)                              \
312         : "r"(src_stride), "r"(3*src_stride),                           \
313           "m"(rnd), "m"(shift)                                          \
314         : "memory"                                                      \
315     );                                                                  \
316 }
317
318 /**
319  * Macro to build the horizontal 16bits version of vc1_put_shift[13].
320  * Here, offset=16bits, so parameters passed A1 to A4 should be simple.
321  *
322  * @param  NAME   Either 1 or 3
323  * @see MSPEL_FILTER13_CORE for information on A1->A4
324  */
325 #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME)        \
326 static void                                                             \
327 OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride,    \
328                                  const int16_t *src, int rnd)           \
329 {                                                                       \
330     int h = 8;                                                          \
331     src -= 1;                                                           \
332     rnd -= (-4+58+13-3)*256; /* Add -256 bias */                        \
333     __asm__ volatile(                                                       \
334         LOAD_ROUNDER_MMX("%4")                                          \
335         "movq      "MANGLE(ff_pw_18)", %%mm6   \n\t"                    \
336         "movq      "MANGLE(ff_pw_53)", %%mm5   \n\t"                    \
337         ".p2align 3                \n\t"                                \
338         "1:                        \n\t"                                \
339         MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4)      \
340         NORMALIZE_MMX("$7")                                             \
341         /* Remove bias */                                               \
342         "paddw     "MANGLE(ff_pw_128)", %%mm3  \n\t"                    \
343         "paddw     "MANGLE(ff_pw_128)", %%mm4  \n\t"                    \
344         TRANSFER_DO_PACK(OP)                                            \
345         "add       $24, %1         \n\t"                                \
346         "add       %3, %2          \n\t"                                \
347         "decl      %0              \n\t"                                \
348         "jnz 1b                    \n\t"                                \
349         : "+r"(h), "+r" (src),  "+r" (dst)                              \
350         : "r"(stride), "m"(rnd)                                         \
351         : "memory"                                                      \
352     );                                                                  \
353 }
354
355 /**
356  * Macro to build the 8bits, any direction, version of vc1_put_shift[13].
357  * Here, offset=src_stride. Parameters passed A1 to A4 must use
358  * %3 (offset) and %4 (3*offset).
359  *
360  * @param  NAME   Either 1 or 3
361  * @see MSPEL_FILTER13_CORE for information on A1->A4
362  */
363 #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME)             \
364 static void                                                             \
365 OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src,         \
366                         x86_reg stride, int rnd, x86_reg offset)      \
367 {                                                                       \
368     int h = 8;                                                          \
369     src -= offset;                                                      \
370     rnd = 32-rnd;                                                       \
371     __asm__ volatile (                                                      \
372         LOAD_ROUNDER_MMX("%6")                                          \
373         "movq      "MANGLE(ff_pw_53)", %%mm5       \n\t"                \
374         "movq      "MANGLE(ff_pw_18)", %%mm6       \n\t"                \
375         ".p2align 3                \n\t"                                \
376         "1:                        \n\t"                                \
377         MSPEL_FILTER13_CORE(DO_UNPACK, "movd   1", A1, A2, A3, A4)      \
378         NORMALIZE_MMX("$6")                                             \
379         TRANSFER_DO_PACK(OP)                                            \
380         "add       %5, %1          \n\t"                                \
381         "add       %5, %2          \n\t"                                \
382         "decl      %0              \n\t"                                \
383         "jnz 1b                    \n\t"                                \
384         : "+r"(h), "+r" (src),  "+r" (dst)                              \
385         : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd)             \
386         : "memory"                                                      \
387     );                                                                  \
388 }
389
390 /** 1/4 shift bicubic interpolation */
391 MSPEL_FILTER13_8B     (shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )", OP_PUT, put_)
392 MSPEL_FILTER13_8B     (shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )", OP_AVG, avg_)
393 MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )")
394 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)
395 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)
396
397 /** 3/4 shift bicubic interpolation */
398 MSPEL_FILTER13_8B     (shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )", OP_PUT, put_)
399 MSPEL_FILTER13_8B     (shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )", OP_AVG, avg_)
400 MSPEL_FILTER13_VER_16B(shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )")
401 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)
402 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)
403
404 typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);
405 typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);
406 typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);
407
408 /**
409  * Interpolate fractional pel values by applying proper vertical then
410  * horizontal filter.
411  *
412  * @param  dst     Destination buffer for interpolated pels.
413  * @param  src     Source buffer.
414  * @param  stride  Stride for both src and dst buffers.
415  * @param  hmode   Horizontal filter (expressed in quarter pixels shift).
416  * @param  hmode   Vertical filter.
417  * @param  rnd     Rounding bias.
418  */
419 #define VC1_MSPEL_MC(OP)\
420 static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\
421                                int hmode, int vmode, int rnd)\
422 {\
423     static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\
424          { NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\
425     static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\
426          { NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\
427     static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\
428          { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\
429 \
430     __asm__ volatile(\
431         "pxor %%mm0, %%mm0         \n\t"\
432         ::: "memory"\
433     );\
434 \
435     if (vmode) { /* Vertical filter to apply */\
436         if (hmode) { /* Horizontal filter to apply, output to tmp */\
437             static const int shift_value[] = { 0, 5, 1, 5 };\
438             int              shift = (shift_value[hmode]+shift_value[vmode])>>1;\
439             int              r;\
440             DECLARE_ALIGNED(16, int16_t, tmp)[12*8];\
441 \
442             r = (1<<(shift-1)) + rnd-1;\
443             vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
444 \
445             vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\
446             return;\
447         }\
448         else { /* No horizontal filter, output 8 lines to dst */\
449             vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
450             return;\
451         }\
452     }\
453 \
454     /* Horizontal mode with no vertical mode */\
455     vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\
456 }
457
458 VC1_MSPEL_MC(put_)
459 VC1_MSPEL_MC(avg_)
460
461 /** Macro to ease bicubic filter interpolation functions declarations */
462 #define DECLARE_FUNCTION(a, b)                                          \
463 static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
464      put_vc1_mspel_mc(dst, src, stride, a, b, rnd);                     \
465 }\
466 static void avg_vc1_mspel_mc ## a ## b ## _mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
467      avg_vc1_mspel_mc(dst, src, stride, a, b, rnd);                     \
468 }
469
470 DECLARE_FUNCTION(0, 1)
471 DECLARE_FUNCTION(0, 2)
472 DECLARE_FUNCTION(0, 3)
473
474 DECLARE_FUNCTION(1, 0)
475 DECLARE_FUNCTION(1, 1)
476 DECLARE_FUNCTION(1, 2)
477 DECLARE_FUNCTION(1, 3)
478
479 DECLARE_FUNCTION(2, 0)
480 DECLARE_FUNCTION(2, 1)
481 DECLARE_FUNCTION(2, 2)
482 DECLARE_FUNCTION(2, 3)
483
484 DECLARE_FUNCTION(3, 0)
485 DECLARE_FUNCTION(3, 1)
486 DECLARE_FUNCTION(3, 2)
487 DECLARE_FUNCTION(3, 3)
488
489 static void vc1_inv_trans_4x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
490 {
491     int dc = block[0];
492     dc = (17 * dc +  4) >> 3;
493     dc = (17 * dc + 64) >> 7;
494     __asm__ volatile(
495         "movd          %0, %%mm0 \n\t"
496         "pshufw $0, %%mm0, %%mm0 \n\t"
497         "pxor       %%mm1, %%mm1 \n\t"
498         "psubw      %%mm0, %%mm1 \n\t"
499         "packuswb   %%mm0, %%mm0 \n\t"
500         "packuswb   %%mm1, %%mm1 \n\t"
501         ::"r"(dc)
502     );
503     __asm__ volatile(
504         "movd          %0, %%mm2 \n\t"
505         "movd          %1, %%mm3 \n\t"
506         "movd          %2, %%mm4 \n\t"
507         "movd          %3, %%mm5 \n\t"
508         "paddusb    %%mm0, %%mm2 \n\t"
509         "paddusb    %%mm0, %%mm3 \n\t"
510         "paddusb    %%mm0, %%mm4 \n\t"
511         "paddusb    %%mm0, %%mm5 \n\t"
512         "psubusb    %%mm1, %%mm2 \n\t"
513         "psubusb    %%mm1, %%mm3 \n\t"
514         "psubusb    %%mm1, %%mm4 \n\t"
515         "psubusb    %%mm1, %%mm5 \n\t"
516         "movd       %%mm2, %0    \n\t"
517         "movd       %%mm3, %1    \n\t"
518         "movd       %%mm4, %2    \n\t"
519         "movd       %%mm5, %3    \n\t"
520         :"+m"(*(uint32_t*)(dest+0*linesize)),
521          "+m"(*(uint32_t*)(dest+1*linesize)),
522          "+m"(*(uint32_t*)(dest+2*linesize)),
523          "+m"(*(uint32_t*)(dest+3*linesize))
524     );
525 }
526
527 static void vc1_inv_trans_4x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
528 {
529     int dc = block[0];
530     dc = (17 * dc +  4) >> 3;
531     dc = (12 * dc + 64) >> 7;
532     __asm__ volatile(
533         "movd          %0, %%mm0 \n\t"
534         "pshufw $0, %%mm0, %%mm0 \n\t"
535         "pxor       %%mm1, %%mm1 \n\t"
536         "psubw      %%mm0, %%mm1 \n\t"
537         "packuswb   %%mm0, %%mm0 \n\t"
538         "packuswb   %%mm1, %%mm1 \n\t"
539         ::"r"(dc)
540     );
541     __asm__ volatile(
542         "movd          %0, %%mm2 \n\t"
543         "movd          %1, %%mm3 \n\t"
544         "movd          %2, %%mm4 \n\t"
545         "movd          %3, %%mm5 \n\t"
546         "paddusb    %%mm0, %%mm2 \n\t"
547         "paddusb    %%mm0, %%mm3 \n\t"
548         "paddusb    %%mm0, %%mm4 \n\t"
549         "paddusb    %%mm0, %%mm5 \n\t"
550         "psubusb    %%mm1, %%mm2 \n\t"
551         "psubusb    %%mm1, %%mm3 \n\t"
552         "psubusb    %%mm1, %%mm4 \n\t"
553         "psubusb    %%mm1, %%mm5 \n\t"
554         "movd       %%mm2, %0    \n\t"
555         "movd       %%mm3, %1    \n\t"
556         "movd       %%mm4, %2    \n\t"
557         "movd       %%mm5, %3    \n\t"
558         :"+m"(*(uint32_t*)(dest+0*linesize)),
559          "+m"(*(uint32_t*)(dest+1*linesize)),
560          "+m"(*(uint32_t*)(dest+2*linesize)),
561          "+m"(*(uint32_t*)(dest+3*linesize))
562     );
563     dest += 4*linesize;
564     __asm__ volatile(
565         "movd          %0, %%mm2 \n\t"
566         "movd          %1, %%mm3 \n\t"
567         "movd          %2, %%mm4 \n\t"
568         "movd          %3, %%mm5 \n\t"
569         "paddusb    %%mm0, %%mm2 \n\t"
570         "paddusb    %%mm0, %%mm3 \n\t"
571         "paddusb    %%mm0, %%mm4 \n\t"
572         "paddusb    %%mm0, %%mm5 \n\t"
573         "psubusb    %%mm1, %%mm2 \n\t"
574         "psubusb    %%mm1, %%mm3 \n\t"
575         "psubusb    %%mm1, %%mm4 \n\t"
576         "psubusb    %%mm1, %%mm5 \n\t"
577         "movd       %%mm2, %0    \n\t"
578         "movd       %%mm3, %1    \n\t"
579         "movd       %%mm4, %2    \n\t"
580         "movd       %%mm5, %3    \n\t"
581         :"+m"(*(uint32_t*)(dest+0*linesize)),
582          "+m"(*(uint32_t*)(dest+1*linesize)),
583          "+m"(*(uint32_t*)(dest+2*linesize)),
584          "+m"(*(uint32_t*)(dest+3*linesize))
585     );
586 }
587
588 static void vc1_inv_trans_8x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
589 {
590     int dc = block[0];
591     dc = ( 3 * dc +  1) >> 1;
592     dc = (17 * dc + 64) >> 7;
593     __asm__ volatile(
594         "movd          %0, %%mm0 \n\t"
595         "pshufw $0, %%mm0, %%mm0 \n\t"
596         "pxor       %%mm1, %%mm1 \n\t"
597         "psubw      %%mm0, %%mm1 \n\t"
598         "packuswb   %%mm0, %%mm0 \n\t"
599         "packuswb   %%mm1, %%mm1 \n\t"
600         ::"r"(dc)
601     );
602     __asm__ volatile(
603         "movq          %0, %%mm2 \n\t"
604         "movq          %1, %%mm3 \n\t"
605         "movq          %2, %%mm4 \n\t"
606         "movq          %3, %%mm5 \n\t"
607         "paddusb    %%mm0, %%mm2 \n\t"
608         "paddusb    %%mm0, %%mm3 \n\t"
609         "paddusb    %%mm0, %%mm4 \n\t"
610         "paddusb    %%mm0, %%mm5 \n\t"
611         "psubusb    %%mm1, %%mm2 \n\t"
612         "psubusb    %%mm1, %%mm3 \n\t"
613         "psubusb    %%mm1, %%mm4 \n\t"
614         "psubusb    %%mm1, %%mm5 \n\t"
615         "movq       %%mm2, %0    \n\t"
616         "movq       %%mm3, %1    \n\t"
617         "movq       %%mm4, %2    \n\t"
618         "movq       %%mm5, %3    \n\t"
619         :"+m"(*(uint32_t*)(dest+0*linesize)),
620          "+m"(*(uint32_t*)(dest+1*linesize)),
621          "+m"(*(uint32_t*)(dest+2*linesize)),
622          "+m"(*(uint32_t*)(dest+3*linesize))
623     );
624 }
625
626 static void vc1_inv_trans_8x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
627 {
628     int dc = block[0];
629     dc = (3 * dc +  1) >> 1;
630     dc = (3 * dc + 16) >> 5;
631     __asm__ volatile(
632         "movd          %0, %%mm0 \n\t"
633         "pshufw $0, %%mm0, %%mm0 \n\t"
634         "pxor       %%mm1, %%mm1 \n\t"
635         "psubw      %%mm0, %%mm1 \n\t"
636         "packuswb   %%mm0, %%mm0 \n\t"
637         "packuswb   %%mm1, %%mm1 \n\t"
638         ::"r"(dc)
639     );
640     __asm__ volatile(
641         "movq          %0, %%mm2 \n\t"
642         "movq          %1, %%mm3 \n\t"
643         "movq          %2, %%mm4 \n\t"
644         "movq          %3, %%mm5 \n\t"
645         "paddusb    %%mm0, %%mm2 \n\t"
646         "paddusb    %%mm0, %%mm3 \n\t"
647         "paddusb    %%mm0, %%mm4 \n\t"
648         "paddusb    %%mm0, %%mm5 \n\t"
649         "psubusb    %%mm1, %%mm2 \n\t"
650         "psubusb    %%mm1, %%mm3 \n\t"
651         "psubusb    %%mm1, %%mm4 \n\t"
652         "psubusb    %%mm1, %%mm5 \n\t"
653         "movq       %%mm2, %0    \n\t"
654         "movq       %%mm3, %1    \n\t"
655         "movq       %%mm4, %2    \n\t"
656         "movq       %%mm5, %3    \n\t"
657         :"+m"(*(uint32_t*)(dest+0*linesize)),
658          "+m"(*(uint32_t*)(dest+1*linesize)),
659          "+m"(*(uint32_t*)(dest+2*linesize)),
660          "+m"(*(uint32_t*)(dest+3*linesize))
661     );
662     dest += 4*linesize;
663     __asm__ volatile(
664         "movq          %0, %%mm2 \n\t"
665         "movq          %1, %%mm3 \n\t"
666         "movq          %2, %%mm4 \n\t"
667         "movq          %3, %%mm5 \n\t"
668         "paddusb    %%mm0, %%mm2 \n\t"
669         "paddusb    %%mm0, %%mm3 \n\t"
670         "paddusb    %%mm0, %%mm4 \n\t"
671         "paddusb    %%mm0, %%mm5 \n\t"
672         "psubusb    %%mm1, %%mm2 \n\t"
673         "psubusb    %%mm1, %%mm3 \n\t"
674         "psubusb    %%mm1, %%mm4 \n\t"
675         "psubusb    %%mm1, %%mm5 \n\t"
676         "movq       %%mm2, %0    \n\t"
677         "movq       %%mm3, %1    \n\t"
678         "movq       %%mm4, %2    \n\t"
679         "movq       %%mm5, %3    \n\t"
680         :"+m"(*(uint32_t*)(dest+0*linesize)),
681          "+m"(*(uint32_t*)(dest+1*linesize)),
682          "+m"(*(uint32_t*)(dest+2*linesize)),
683          "+m"(*(uint32_t*)(dest+3*linesize))
684     );
685 }
686
687 #endif /* HAVE_INLINE_ASM */
688
689 #define LOOP_FILTER(EXT) \
690 void ff_vc1_v_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
691 void ff_vc1_h_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
692 void ff_vc1_v_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
693 void ff_vc1_h_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
694 \
695 static void vc1_v_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
696 { \
697     ff_vc1_v_loop_filter8_ ## EXT(src,   stride, pq); \
698     ff_vc1_v_loop_filter8_ ## EXT(src+8, stride, pq); \
699 } \
700 \
701 static void vc1_h_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
702 { \
703     ff_vc1_h_loop_filter8_ ## EXT(src,          stride, pq); \
704     ff_vc1_h_loop_filter8_ ## EXT(src+8*stride, stride, pq); \
705 }
706
707 #if HAVE_YASM
708 LOOP_FILTER(mmx2)
709 LOOP_FILTER(sse2)
710 LOOP_FILTER(ssse3)
711
712 void ff_vc1_h_loop_filter8_sse4(uint8_t *src, int stride, int pq);
713
714 static void vc1_h_loop_filter16_sse4(uint8_t *src, int stride, int pq)
715 {
716     ff_vc1_h_loop_filter8_sse4(src,          stride, pq);
717     ff_vc1_h_loop_filter8_sse4(src+8*stride, stride, pq);
718 }
719
720 #endif
721
722 void ff_put_vc1_chroma_mc8_mmx_nornd  (uint8_t *dst, uint8_t *src,
723                                        int stride, int h, int x, int y);
724 void ff_avg_vc1_chroma_mc8_mmx2_nornd (uint8_t *dst, uint8_t *src,
725                                        int stride, int h, int x, int y);
726 void ff_avg_vc1_chroma_mc8_3dnow_nornd(uint8_t *dst, uint8_t *src,
727                                        int stride, int h, int x, int y);
728 void ff_put_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src,
729                                        int stride, int h, int x, int y);
730 void ff_avg_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src,
731                                        int stride, int h, int x, int y);
732
733 void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)
734 {
735     int mm_flags = av_get_cpu_flags();
736
737 #if HAVE_INLINE_ASM
738     if (mm_flags & AV_CPU_FLAG_MMX) {
739         dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx;
740         dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx;
741         dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx;
742         dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_mmx;
743
744         dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_mmx;
745         dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_mmx;
746         dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_mmx;
747         dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_mmx;
748
749         dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_mmx;
750         dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_mmx;
751         dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_mmx;
752         dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_mmx;
753
754         dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_mmx;
755         dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx;
756         dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx;
757         dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
758
759         if (HAVE_YASM)
760             dsp->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_mmx_nornd;
761     }
762
763     if (mm_flags & AV_CPU_FLAG_MMXEXT) {
764         dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2;
765         dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2;
766         dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2;
767         dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmx2;
768
769         dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmx2;
770         dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmx2;
771         dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmx2;
772         dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmx2;
773
774         dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmx2;
775         dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmx2;
776         dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmx2;
777         dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmx2;
778
779         dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmx2;
780         dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmx2;
781         dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmx2;
782         dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmx2;
783
784         dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_mmx2;
785         dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_mmx2;
786         dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_mmx2;
787         dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_mmx2;
788
789         if (HAVE_YASM)
790             dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_mmx2_nornd;
791     } else if (HAVE_YASM && mm_flags & AV_CPU_FLAG_3DNOW) {
792         dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_3dnow_nornd;
793     }
794
795     if (HAVE_YASM && mm_flags & AV_CPU_FLAG_SSSE3) {
796         dsp->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_ssse3_nornd;
797         dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_ssse3_nornd;
798     }
799 #endif /* HAVE_INLINE_ASM */
800
801 #define ASSIGN_LF(EXT) \
802         dsp->vc1_v_loop_filter4  = ff_vc1_v_loop_filter4_ ## EXT; \
803         dsp->vc1_h_loop_filter4  = ff_vc1_h_loop_filter4_ ## EXT; \
804         dsp->vc1_v_loop_filter8  = ff_vc1_v_loop_filter8_ ## EXT; \
805         dsp->vc1_h_loop_filter8  = ff_vc1_h_loop_filter8_ ## EXT; \
806         dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_ ## EXT; \
807         dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_ ## EXT
808
809 #if HAVE_YASM
810     if (mm_flags & AV_CPU_FLAG_MMX) {
811     }
812
813     if (mm_flags & AV_CPU_FLAG_MMXEXT) {
814         ASSIGN_LF(mmx2);
815     }
816
817     if (mm_flags & AV_CPU_FLAG_SSE2) {
818         dsp->vc1_v_loop_filter8  = ff_vc1_v_loop_filter8_sse2;
819         dsp->vc1_h_loop_filter8  = ff_vc1_h_loop_filter8_sse2;
820         dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_sse2;
821         dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse2;
822     }
823     if (mm_flags & AV_CPU_FLAG_SSSE3) {
824         ASSIGN_LF(ssse3);
825     }
826     if (mm_flags & AV_CPU_FLAG_SSE4) {
827         dsp->vc1_h_loop_filter8  = ff_vc1_h_loop_filter8_sse4;
828         dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse4;
829     }
830 #endif
831 }