x86: mlpdsp: mlp_filter_channel_x86 requires inline asm
[ffmpeg.git] / libavcodec / x86 / mlpdsp.c
1 /*
2  * MLP DSP functions x86-optimized
3  * Copyright (c) 2009 Ramiro Polla
4  *
5  * This file is part of Libav.
6  *
7  * Libav is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * Libav is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with Libav; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21
22 #include "libavutil/internal.h"
23 #include "libavutil/x86/asm.h"
24 #include "libavcodec/dsputil.h"
25 #include "libavcodec/mlp.h"
26
27 #if HAVE_7REGS && HAVE_INLINE_ASM
28
29 extern char ff_mlp_firorder_8;
30 extern char ff_mlp_firorder_7;
31 extern char ff_mlp_firorder_6;
32 extern char ff_mlp_firorder_5;
33 extern char ff_mlp_firorder_4;
34 extern char ff_mlp_firorder_3;
35 extern char ff_mlp_firorder_2;
36 extern char ff_mlp_firorder_1;
37 extern char ff_mlp_firorder_0;
38
39 extern char ff_mlp_iirorder_4;
40 extern char ff_mlp_iirorder_3;
41 extern char ff_mlp_iirorder_2;
42 extern char ff_mlp_iirorder_1;
43 extern char ff_mlp_iirorder_0;
44
45 static const void *firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
46                                    &ff_mlp_firorder_2, &ff_mlp_firorder_3,
47                                    &ff_mlp_firorder_4, &ff_mlp_firorder_5,
48                                    &ff_mlp_firorder_6, &ff_mlp_firorder_7,
49                                    &ff_mlp_firorder_8 };
50 static const void *iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
51                                    &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
52                                    &ff_mlp_iirorder_4 };
53
54 #if ARCH_X86_64
55
56 #define MLPMUL(label, offset, offs, offc)   \
57     LABEL_MANGLE(label)":             \n\t" \
58     "movslq "offset"+"offs"(%0), %%rax\n\t" \
59     "movslq "offset"+"offc"(%1), %%rdx\n\t" \
60     "imul                 %%rdx, %%rax\n\t" \
61     "add                  %%rax, %%rsi\n\t"
62
63 #define FIRMULREG(label, offset, firc)\
64     LABEL_MANGLE(label)":       \n\t" \
65     "movslq "#offset"(%0), %%rax\n\t" \
66     "imul        %"#firc", %%rax\n\t" \
67     "add            %%rax, %%rsi\n\t"
68
69 #define CLEAR_ACCUM                   \
70     "xor            %%rsi, %%rsi\n\t"
71
72 #define SHIFT_ACCUM                   \
73     "shr     %%cl,         %%rsi\n\t"
74
75 #define ACCUM    "%%rdx"
76 #define RESULT   "%%rsi"
77 #define RESULT32 "%%esi"
78
79 #else /* if ARCH_X86_32 */
80
81 #define MLPMUL(label, offset, offs, offc)  \
82     LABEL_MANGLE(label)":            \n\t" \
83     "mov   "offset"+"offs"(%0), %%eax\n\t" \
84     "imull "offset"+"offc"(%1)       \n\t" \
85     "add                %%eax , %%esi\n\t" \
86     "adc                %%edx , %%ecx\n\t"
87
88 #define FIRMULREG(label, offset, firc)  \
89     MLPMUL(label, #offset, "0", "0")
90
91 #define CLEAR_ACCUM                  \
92     "xor           %%esi, %%esi\n\t" \
93     "xor           %%ecx, %%ecx\n\t"
94
95 #define SHIFT_ACCUM                  \
96     "mov           %%ecx, %%edx\n\t" \
97     "mov           %%esi, %%eax\n\t" \
98     "movzbl        %7   , %%ecx\n\t" \
99     "shrd    %%cl, %%edx, %%eax\n\t" \
100
101 #define ACCUM    "%%edx"
102 #define RESULT   "%%eax"
103 #define RESULT32 "%%eax"
104
105 #endif /* !ARCH_X86_64 */
106
107 #define BINC  AV_STRINGIFY(4* MAX_CHANNELS)
108 #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
109 #define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
110
111 #define FIRMUL(label, offset) MLPMUL(label, #offset,   "0",   "0")
112 #define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
113
114 static void mlp_filter_channel_x86(int32_t *state, const int32_t *coeff,
115                                    int firorder, int iirorder,
116                                    unsigned int filter_shift, int32_t mask,
117                                    int blocksize, int32_t *sample_buffer)
118 {
119     const void *firjump = firtable[firorder];
120     const void *iirjump = iirtable[iirorder];
121
122     blocksize = -blocksize;
123
124     __asm__ volatile(
125         "1:                           \n\t"
126         CLEAR_ACCUM
127         "jmp  *%5                     \n\t"
128         FIRMUL   (ff_mlp_firorder_8, 0x1c   )
129         FIRMUL   (ff_mlp_firorder_7, 0x18   )
130         FIRMUL   (ff_mlp_firorder_6, 0x14   )
131         FIRMUL   (ff_mlp_firorder_5, 0x10   )
132         FIRMUL   (ff_mlp_firorder_4, 0x0c   )
133         FIRMULREG(ff_mlp_firorder_3, 0x08,10)
134         FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
135         FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
136         LABEL_MANGLE(ff_mlp_firorder_0)":\n\t"
137         "jmp  *%6                     \n\t"
138         IIRMUL   (ff_mlp_iirorder_4, 0x0c   )
139         IIRMUL   (ff_mlp_iirorder_3, 0x08   )
140         IIRMUL   (ff_mlp_iirorder_2, 0x04   )
141         IIRMUL   (ff_mlp_iirorder_1, 0x00   )
142         LABEL_MANGLE(ff_mlp_iirorder_0)":\n\t"
143         SHIFT_ACCUM
144         "mov  "RESULT"  ,"ACCUM"      \n\t"
145         "add  (%2)      ,"RESULT"     \n\t"
146         "and   %4       ,"RESULT"     \n\t"
147         "sub   $4       ,  %0         \n\t"
148         "mov  "RESULT32", (%0)        \n\t"
149         "mov  "RESULT32", (%2)        \n\t"
150         "add $"BINC"    ,  %2         \n\t"
151         "sub  "ACCUM"   ,"RESULT"     \n\t"
152         "mov  "RESULT32","IOFFS"(%0)  \n\t"
153         "incl              %3         \n\t"
154         "js 1b                        \n\t"
155         : /* 0*/"+r"(state),
156           /* 1*/"+r"(coeff),
157           /* 2*/"+r"(sample_buffer),
158 #if ARCH_X86_64
159           /* 3*/"+r"(blocksize)
160         : /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump),
161           /* 6*/"r"(iirjump)      , /* 7*/"c"(filter_shift)
162         , /* 8*/"r"((int64_t)coeff[0])
163         , /* 9*/"r"((int64_t)coeff[1])
164         , /*10*/"r"((int64_t)coeff[2])
165         : "rax", "rdx", "rsi"
166 #else /* ARCH_X86_32 */
167           /* 3*/"+m"(blocksize)
168         : /* 4*/"m"(         mask), /* 5*/"m"(firjump),
169           /* 6*/"m"(iirjump)      , /* 7*/"m"(filter_shift)
170         : "eax", "edx", "esi", "ecx"
171 #endif /* !ARCH_X86_64 */
172     );
173 }
174
175 #endif /* HAVE_7REGS && HAVE_INLINE_ASM */
176
177 void ff_mlp_init_x86(DSPContext* c, AVCodecContext *avctx)
178 {
179 #if HAVE_7REGS && HAVE_INLINE_ASM
180     c->mlp_filter_channel = mlp_filter_channel_x86;
181 #endif
182 }