2 * H.264 hardware encoding using nvidia nvenc
3 * Copyright (c) 2014 Timo Rothenpieler <timo@rothenpieler.org>
5 * This file is part of FFmpeg.
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
30 #include "libavutil/imgutils.h"
31 #include "libavutil/avassert.h"
32 #include "libavutil/mem.h"
33 #include "libavutil/hwcontext.h"
40 #include "libavutil/hwcontext_cuda.h"
44 #define LOAD_FUNC(l, s) GetProcAddress(l, s)
45 #define DL_CLOSE_FUNC(l) FreeLibrary(l)
47 #define LOAD_FUNC(l, s) dlsym(l, s)
48 #define DL_CLOSE_FUNC(l) dlclose(l)
51 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
61 typedef struct NvencData
65 NvencSurface *surface;
69 typedef struct NvencValuePair
75 static const NvencValuePair nvenc_h264_level_pairs[] = {
76 { "auto", NV_ENC_LEVEL_AUTOSELECT },
77 { "1" , NV_ENC_LEVEL_H264_1 },
78 { "1.0" , NV_ENC_LEVEL_H264_1 },
79 { "1b" , NV_ENC_LEVEL_H264_1b },
80 { "1.0b", NV_ENC_LEVEL_H264_1b },
81 { "1.1" , NV_ENC_LEVEL_H264_11 },
82 { "1.2" , NV_ENC_LEVEL_H264_12 },
83 { "1.3" , NV_ENC_LEVEL_H264_13 },
84 { "2" , NV_ENC_LEVEL_H264_2 },
85 { "2.0" , NV_ENC_LEVEL_H264_2 },
86 { "2.1" , NV_ENC_LEVEL_H264_21 },
87 { "2.2" , NV_ENC_LEVEL_H264_22 },
88 { "3" , NV_ENC_LEVEL_H264_3 },
89 { "3.0" , NV_ENC_LEVEL_H264_3 },
90 { "3.1" , NV_ENC_LEVEL_H264_31 },
91 { "3.2" , NV_ENC_LEVEL_H264_32 },
92 { "4" , NV_ENC_LEVEL_H264_4 },
93 { "4.0" , NV_ENC_LEVEL_H264_4 },
94 { "4.1" , NV_ENC_LEVEL_H264_41 },
95 { "4.2" , NV_ENC_LEVEL_H264_42 },
96 { "5" , NV_ENC_LEVEL_H264_5 },
97 { "5.0" , NV_ENC_LEVEL_H264_5 },
98 { "5.1" , NV_ENC_LEVEL_H264_51 },
102 static const NvencValuePair nvenc_hevc_level_pairs[] = {
103 { "auto", NV_ENC_LEVEL_AUTOSELECT },
104 { "1" , NV_ENC_LEVEL_HEVC_1 },
105 { "1.0" , NV_ENC_LEVEL_HEVC_1 },
106 { "2" , NV_ENC_LEVEL_HEVC_2 },
107 { "2.0" , NV_ENC_LEVEL_HEVC_2 },
108 { "2.1" , NV_ENC_LEVEL_HEVC_21 },
109 { "3" , NV_ENC_LEVEL_HEVC_3 },
110 { "3.0" , NV_ENC_LEVEL_HEVC_3 },
111 { "3.1" , NV_ENC_LEVEL_HEVC_31 },
112 { "4" , NV_ENC_LEVEL_HEVC_4 },
113 { "4.0" , NV_ENC_LEVEL_HEVC_4 },
114 { "4.1" , NV_ENC_LEVEL_HEVC_41 },
115 { "5" , NV_ENC_LEVEL_HEVC_5 },
116 { "5.0" , NV_ENC_LEVEL_HEVC_5 },
117 { "5.1" , NV_ENC_LEVEL_HEVC_51 },
118 { "5.2" , NV_ENC_LEVEL_HEVC_52 },
119 { "6" , NV_ENC_LEVEL_HEVC_6 },
120 { "6.0" , NV_ENC_LEVEL_HEVC_6 },
121 { "6.1" , NV_ENC_LEVEL_HEVC_61 },
122 { "6.2" , NV_ENC_LEVEL_HEVC_62 },
126 static const struct {
131 { NV_ENC_SUCCESS, 0, "success" },
132 { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
133 { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
134 { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
135 { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
136 { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
137 { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
138 { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
139 { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
140 { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
141 { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
142 { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
143 { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
144 { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
145 { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR(ENOBUFS), "not enough buffer" },
146 { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
147 { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
148 { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
149 { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
150 { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
151 { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
152 { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
153 { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
154 { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
155 { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
156 { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
159 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
162 for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
163 if (nvenc_errors[i].nverr == err) {
165 *desc = nvenc_errors[i].desc;
166 return nvenc_errors[i].averr;
170 *desc = "unknown error";
171 return AVERROR_UNKNOWN;
174 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
175 const char *error_string)
179 ret = nvenc_map_error(err, &desc);
180 av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
184 static int input_string_to_uint32(AVCodecContext *avctx, const NvencValuePair *pair, const char *input, uint32_t *output)
186 for (; pair->str; ++pair) {
187 if (!strcmp(input, pair->str)) {
193 return AVERROR(EINVAL);
196 static void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
198 av_fifo_generic_write(queue, ×tamp, sizeof(timestamp), NULL);
201 static int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
203 int64_t timestamp = AV_NOPTS_VALUE;
204 if (av_fifo_size(queue) > 0)
205 av_fifo_generic_read(queue, ×tamp, sizeof(timestamp), NULL);
210 #define CHECK_LOAD_FUNC(t, f, s) \
212 (f) = (t)LOAD_FUNC(dl_fn->cuda_lib, s); \
214 av_log(avctx, AV_LOG_FATAL, "Failed loading %s from CUDA library\n", s); \
219 static av_cold int nvenc_dyload_cuda(AVCodecContext *avctx)
221 NvencContext *ctx = avctx->priv_data;
222 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
225 dl_fn->cu_init = cuInit;
226 dl_fn->cu_device_get_count = cuDeviceGetCount;
227 dl_fn->cu_device_get = cuDeviceGet;
228 dl_fn->cu_device_get_name = cuDeviceGetName;
229 dl_fn->cu_device_compute_capability = cuDeviceComputeCapability;
230 dl_fn->cu_ctx_create = cuCtxCreate_v2;
231 dl_fn->cu_ctx_pop_current = cuCtxPopCurrent_v2;
232 dl_fn->cu_ctx_destroy = cuCtxDestroy_v2;
240 dl_fn->cuda_lib = LoadLibrary(TEXT("nvcuda.dll"));
242 dl_fn->cuda_lib = dlopen("libcuda.so", RTLD_LAZY);
245 if (!dl_fn->cuda_lib) {
246 av_log(avctx, AV_LOG_FATAL, "Failed loading CUDA library\n");
250 CHECK_LOAD_FUNC(PCUINIT, dl_fn->cu_init, "cuInit");
251 CHECK_LOAD_FUNC(PCUDEVICEGETCOUNT, dl_fn->cu_device_get_count, "cuDeviceGetCount");
252 CHECK_LOAD_FUNC(PCUDEVICEGET, dl_fn->cu_device_get, "cuDeviceGet");
253 CHECK_LOAD_FUNC(PCUDEVICEGETNAME, dl_fn->cu_device_get_name, "cuDeviceGetName");
254 CHECK_LOAD_FUNC(PCUDEVICECOMPUTECAPABILITY, dl_fn->cu_device_compute_capability, "cuDeviceComputeCapability");
255 CHECK_LOAD_FUNC(PCUCTXCREATE, dl_fn->cu_ctx_create, "cuCtxCreate_v2");
256 CHECK_LOAD_FUNC(PCUCTXPOPCURRENT, dl_fn->cu_ctx_pop_current, "cuCtxPopCurrent_v2");
257 CHECK_LOAD_FUNC(PCUCTXDESTROY, dl_fn->cu_ctx_destroy, "cuCtxDestroy_v2");
264 DL_CLOSE_FUNC(dl_fn->cuda_lib);
266 dl_fn->cuda_lib = NULL;
272 static av_cold int check_cuda_errors(AVCodecContext *avctx, CUresult err, const char *func)
274 if (err != CUDA_SUCCESS) {
275 av_log(avctx, AV_LOG_FATAL, ">> %s - failed with error code 0x%x\n", func, err);
280 #define check_cuda_errors(f) if (!check_cuda_errors(avctx, f, #f)) goto error
282 static av_cold int nvenc_check_cuda(AVCodecContext *avctx)
284 int device_count = 0;
285 CUdevice cu_device = 0;
287 int smminor = 0, smmajor = 0;
288 int i, smver, target_smver;
290 NvencContext *ctx = avctx->priv_data;
291 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
293 switch (avctx->codec->id) {
294 case AV_CODEC_ID_H264:
295 target_smver = ctx->data_pix_fmt == AV_PIX_FMT_YUV444P ? 0x52 : 0x30;
297 case AV_CODEC_ID_H265:
301 av_log(avctx, AV_LOG_FATAL, "Unknown codec name\n");
305 if (ctx->preset >= PRESET_LOSSLESS_DEFAULT)
308 if (!nvenc_dyload_cuda(avctx))
311 if (dl_fn->nvenc_device_count > 0)
314 check_cuda_errors(dl_fn->cu_init(0));
316 check_cuda_errors(dl_fn->cu_device_get_count(&device_count));
319 av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
323 av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", device_count);
325 dl_fn->nvenc_device_count = 0;
327 for (i = 0; i < device_count; ++i) {
328 check_cuda_errors(dl_fn->cu_device_get(&cu_device, i));
329 check_cuda_errors(dl_fn->cu_device_get_name(gpu_name, sizeof(gpu_name), cu_device));
330 check_cuda_errors(dl_fn->cu_device_compute_capability(&smmajor, &smminor, cu_device));
332 smver = (smmajor << 4) | smminor;
334 av_log(avctx, AV_LOG_VERBOSE, "[ GPU #%d - < %s > has Compute SM %d.%d, NVENC %s ]\n", i, gpu_name, smmajor, smminor, (smver >= target_smver) ? "Available" : "Not Available");
336 if (smver >= target_smver)
337 dl_fn->nvenc_devices[dl_fn->nvenc_device_count++] = cu_device;
340 if (!dl_fn->nvenc_device_count) {
341 av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
349 dl_fn->nvenc_device_count = 0;
354 static av_cold int nvenc_dyload_nvenc(AVCodecContext *avctx)
356 PNVENCODEAPICREATEINSTANCE nvEncodeAPICreateInstance = 0;
357 NVENCSTATUS nvstatus;
359 NvencContext *ctx = avctx->priv_data;
360 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
362 if (!nvenc_check_cuda(avctx))
365 if (dl_fn->nvenc_lib)
369 if (sizeof(void*) == 8) {
370 dl_fn->nvenc_lib = LoadLibrary(TEXT("nvEncodeAPI64.dll"));
372 dl_fn->nvenc_lib = LoadLibrary(TEXT("nvEncodeAPI.dll"));
375 dl_fn->nvenc_lib = dlopen("libnvidia-encode.so.1", RTLD_LAZY);
378 if (!dl_fn->nvenc_lib) {
379 av_log(avctx, AV_LOG_FATAL, "Failed loading the nvenc library\n");
383 nvEncodeAPICreateInstance = (PNVENCODEAPICREATEINSTANCE)LOAD_FUNC(dl_fn->nvenc_lib, "NvEncodeAPICreateInstance");
385 if (!nvEncodeAPICreateInstance) {
386 av_log(avctx, AV_LOG_FATAL, "Failed to load nvenc entrypoint\n");
390 dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
392 nvstatus = nvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
394 if (nvstatus != NV_ENC_SUCCESS) {
395 nvenc_print_error(avctx, nvstatus, "Failed to create nvenc instance");
399 av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
404 if (dl_fn->nvenc_lib)
405 DL_CLOSE_FUNC(dl_fn->nvenc_lib);
407 dl_fn->nvenc_lib = NULL;
412 static av_cold void nvenc_unload_nvenc(AVCodecContext *avctx)
414 NvencContext *ctx = avctx->priv_data;
415 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
417 DL_CLOSE_FUNC(dl_fn->nvenc_lib);
418 dl_fn->nvenc_lib = NULL;
420 dl_fn->nvenc_device_count = 0;
423 DL_CLOSE_FUNC(dl_fn->cuda_lib);
424 dl_fn->cuda_lib = NULL;
427 dl_fn->cu_init = NULL;
428 dl_fn->cu_device_get_count = NULL;
429 dl_fn->cu_device_get = NULL;
430 dl_fn->cu_device_get_name = NULL;
431 dl_fn->cu_device_compute_capability = NULL;
432 dl_fn->cu_ctx_create = NULL;
433 dl_fn->cu_ctx_pop_current = NULL;
434 dl_fn->cu_ctx_destroy = NULL;
436 av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
439 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
441 NvencContext *ctx = avctx->priv_data;
442 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
445 CUcontext cu_context_curr;
447 switch (avctx->codec->id) {
448 case AV_CODEC_ID_H264:
449 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
451 case AV_CODEC_ID_HEVC:
452 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
458 ctx->data_pix_fmt = avctx->pix_fmt;
461 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
462 AVHWFramesContext *frames_ctx;
463 AVCUDADeviceContext *device_hwctx;
465 if (!avctx->hw_frames_ctx) {
466 av_log(avctx, AV_LOG_ERROR, "hw_frames_ctx must be set when using GPU frames as input\n");
467 return AVERROR(EINVAL);
470 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
471 device_hwctx = frames_ctx->device_ctx->hwctx;
472 ctx->cu_context = device_hwctx->cuda_ctx;
473 ctx->data_pix_fmt = frames_ctx->sw_format;
478 if (ctx->gpu >= dl_fn->nvenc_device_count) {
479 av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->gpu, dl_fn->nvenc_device_count);
480 return AVERROR(EINVAL);
483 ctx->cu_context = NULL;
484 cu_res = dl_fn->cu_ctx_create(&ctx->cu_context_internal, 4, dl_fn->nvenc_devices[ctx->gpu]); // CU_CTX_SCHED_BLOCKING_SYNC=4, avoid CPU spins
486 if (cu_res != CUDA_SUCCESS) {
487 av_log(avctx, AV_LOG_FATAL, "Failed creating CUDA context for NVENC: 0x%x\n", (int)cu_res);
488 return AVERROR_EXTERNAL;
491 cu_res = dl_fn->cu_ctx_pop_current(&cu_context_curr);
493 if (cu_res != CUDA_SUCCESS) {
494 av_log(avctx, AV_LOG_FATAL, "Failed popping CUDA context: 0x%x\n", (int)cu_res);
495 return AVERROR_EXTERNAL;
498 ctx->cu_context = ctx->cu_context_internal;
503 static av_cold int nvenc_open_session(AVCodecContext *avctx)
505 NvencContext *ctx = avctx->priv_data;
506 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
507 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
509 NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS encode_session_params = { 0 };
510 NVENCSTATUS nv_status;
512 encode_session_params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
513 encode_session_params.apiVersion = NVENCAPI_VERSION;
514 encode_session_params.device = ctx->cu_context;
515 encode_session_params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
517 nv_status = p_nvenc->nvEncOpenEncodeSessionEx(&encode_session_params, &ctx->nvencoder);
518 if (nv_status != NV_ENC_SUCCESS) {
519 ctx->nvencoder = NULL;
520 return nvenc_print_error(avctx, nv_status, "OpenEncodeSessionEx failed");
526 typedef struct GUIDTuple {
531 static void nvenc_map_preset(NvencContext *ctx)
533 GUIDTuple presets[] = {
534 { NV_ENC_PRESET_DEFAULT_GUID },
535 { NV_ENC_PRESET_HQ_GUID, NVENC_TWO_PASSES }, /* slow */
536 { NV_ENC_PRESET_HQ_GUID, NVENC_ONE_PASS }, /* medium */
537 { NV_ENC_PRESET_HP_GUID, NVENC_ONE_PASS }, /* fast */
538 { NV_ENC_PRESET_HP_GUID },
539 { NV_ENC_PRESET_HQ_GUID },
540 { NV_ENC_PRESET_BD_GUID },
541 { NV_ENC_PRESET_LOW_LATENCY_DEFAULT_GUID, NVENC_LOWLATENCY },
542 { NV_ENC_PRESET_LOW_LATENCY_HQ_GUID, NVENC_LOWLATENCY },
543 { NV_ENC_PRESET_LOW_LATENCY_HP_GUID, NVENC_LOWLATENCY },
544 { NV_ENC_PRESET_LOSSLESS_DEFAULT_GUID, NVENC_LOSSLESS },
545 { NV_ENC_PRESET_LOSSLESS_HP_GUID, NVENC_LOSSLESS },
548 GUIDTuple *t = &presets[ctx->preset];
550 ctx->init_encode_params.presetGUID = t->guid;
551 ctx->flags = t->flags;
554 static av_cold void set_constqp(AVCodecContext *avctx)
556 NvencContext *ctx = avctx->priv_data;
558 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
559 ctx->encode_config.rcParams.constQP.qpInterB = avctx->global_quality;
560 ctx->encode_config.rcParams.constQP.qpInterP = avctx->global_quality;
561 ctx->encode_config.rcParams.constQP.qpIntra = avctx->global_quality;
564 static av_cold void set_vbr(AVCodecContext *avctx)
566 NvencContext *ctx = avctx->priv_data;
568 ctx->encode_config.rcParams.enableMinQP = 1;
569 ctx->encode_config.rcParams.enableMaxQP = 1;
571 ctx->encode_config.rcParams.minQP.qpInterB = avctx->qmin;
572 ctx->encode_config.rcParams.minQP.qpInterP = avctx->qmin;
573 ctx->encode_config.rcParams.minQP.qpIntra = avctx->qmin;
575 ctx->encode_config.rcParams.maxQP.qpInterB = avctx->qmax;
576 ctx->encode_config.rcParams.maxQP.qpInterP = avctx->qmax;
577 ctx->encode_config.rcParams.maxQP.qpIntra = avctx->qmax;
580 static av_cold void set_lossless(AVCodecContext *avctx)
582 NvencContext *ctx = avctx->priv_data;
584 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
585 ctx->encode_config.rcParams.constQP.qpInterB = 0;
586 ctx->encode_config.rcParams.constQP.qpInterP = 0;
587 ctx->encode_config.rcParams.constQP.qpIntra = 0;
590 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
592 NvencContext *ctx = avctx->priv_data;
596 if (avctx->bit_rate > 0) {
597 ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
598 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
599 ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
602 if (avctx->rc_max_rate > 0)
603 ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
605 if (ctx->flags & NVENC_LOSSLESS) {
610 } else if (ctx->cbr) {
612 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_CBR;
614 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_2_PASS_QUALITY;
616 if (avctx->codec->id == AV_CODEC_ID_H264) {
617 ctx->encode_config.encodeCodecConfig.h264Config.adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
618 ctx->encode_config.encodeCodecConfig.h264Config.fmoMode = NV_ENC_H264_FMO_DISABLE;
622 if (avctx->codec->id == AV_CODEC_ID_H264) {
623 ctx->encode_config.encodeCodecConfig.h264Config.outputBufferingPeriodSEI = 1;
624 ctx->encode_config.encodeCodecConfig.h264Config.outputPictureTimingSEI = 1;
625 } else if (avctx->codec->id == AV_CODEC_ID_H265) {
626 ctx->encode_config.encodeCodecConfig.hevcConfig.outputBufferingPeriodSEI = 1;
627 ctx->encode_config.encodeCodecConfig.hevcConfig.outputPictureTimingSEI = 1;
629 } else if (avctx->global_quality > 0) {
635 if (avctx->qmin >= 0 && avctx->qmax >= 0) {
638 qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
641 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_2_PASS_VBR;
642 if (avctx->codec->id == AV_CODEC_ID_H264) {
643 ctx->encode_config.encodeCodecConfig.h264Config.adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
644 ctx->encode_config.encodeCodecConfig.h264Config.fmoMode = NV_ENC_H264_FMO_DISABLE;
647 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR_MINQP;
650 qp_inter_p = 26; // default to 26
653 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_2_PASS_VBR;
655 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
659 ctx->encode_config.rcParams.enableInitialRCQP = 1;
660 ctx->encode_config.rcParams.initialRCQP.qpInterP = qp_inter_p;
662 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
663 ctx->encode_config.rcParams.initialRCQP.qpIntra = av_clip(
664 qp_inter_p * fabs(avctx->i_quant_factor) + avctx->i_quant_offset, 0, 51);
665 ctx->encode_config.rcParams.initialRCQP.qpInterB = av_clip(
666 qp_inter_p * fabs(avctx->b_quant_factor) + avctx->b_quant_offset, 0, 51);
668 ctx->encode_config.rcParams.initialRCQP.qpIntra = qp_inter_p;
669 ctx->encode_config.rcParams.initialRCQP.qpInterB = qp_inter_p;
673 if (avctx->rc_buffer_size > 0) {
674 ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
675 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
676 ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
680 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
682 NvencContext *ctx = avctx->priv_data;
683 NV_ENC_CONFIG *cc = &ctx->encode_config;
684 NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
685 NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
688 vui->colourMatrix = avctx->colorspace;
689 vui->colourPrimaries = avctx->color_primaries;
690 vui->transferCharacteristics = avctx->color_trc;
691 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
692 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
694 vui->colourDescriptionPresentFlag =
695 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
697 vui->videoSignalTypePresentFlag =
698 (vui->colourDescriptionPresentFlag
699 || vui->videoFormat != 5
700 || vui->videoFullRangeFlag != 0);
703 h264->sliceModeData = 1;
705 h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
706 h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
710 if (ctx->flags & NVENC_LOSSLESS) {
711 h264->qpPrimeYZeroTransformBypassFlag = 1;
713 switch(ctx->profile) {
714 case NV_ENC_H264_PROFILE_BASELINE:
715 cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
716 avctx->profile = FF_PROFILE_H264_BASELINE;
718 case NV_ENC_H264_PROFILE_MAIN:
719 cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
720 avctx->profile = FF_PROFILE_H264_MAIN;
722 case NV_ENC_H264_PROFILE_HIGH:
723 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
724 avctx->profile = FF_PROFILE_H264_HIGH;
726 case NV_ENC_H264_PROFILE_HIGH_444P:
727 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
728 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
733 // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
734 if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
735 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
736 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
739 h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
742 res = input_string_to_uint32(avctx, nvenc_h264_level_pairs, ctx->level, &h264->level);
745 av_log(avctx, AV_LOG_FATAL, "Level \"%s\" is unknown! Supported levels: auto, 1, 1b, 1.1, 1.2, 1.3, 2, 2.1, 2.2, 3, 3.1, 3.2, 4, 4.1, 4.2, 5, 5.1\n", ctx->level);
749 h264->level = NV_ENC_LEVEL_AUTOSELECT;
755 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
757 NvencContext *ctx = avctx->priv_data;
758 NV_ENC_CONFIG *cc = &ctx->encode_config;
759 NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
760 NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
763 vui->colourMatrix = avctx->colorspace;
764 vui->colourPrimaries = avctx->color_primaries;
765 vui->transferCharacteristics = avctx->color_trc;
766 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
767 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
769 vui->colourDescriptionPresentFlag =
770 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
772 vui->videoSignalTypePresentFlag =
773 (vui->colourDescriptionPresentFlag
774 || vui->videoFormat != 5
775 || vui->videoFullRangeFlag != 0);
778 hevc->sliceModeData = 1;
780 hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
781 hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
785 /* No other profile is supported in the current SDK version 5 */
786 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
787 avctx->profile = FF_PROFILE_HEVC_MAIN;
790 res = input_string_to_uint32(avctx, nvenc_hevc_level_pairs, ctx->level, &hevc->level);
793 av_log(avctx, AV_LOG_FATAL, "Level \"%s\" is unknown! Supported levels: auto, 1, 2, 2.1, 3, 3.1, 4, 4.1, 5, 5.1, 5.2, 6, 6.1, 6.2\n", ctx->level);
797 hevc->level = NV_ENC_LEVEL_AUTOSELECT;
801 if (!strcmp(ctx->tier, "main")) {
802 hevc->tier = NV_ENC_TIER_HEVC_MAIN;
803 } else if (!strcmp(ctx->tier, "high")) {
804 hevc->tier = NV_ENC_TIER_HEVC_HIGH;
806 av_log(avctx, AV_LOG_FATAL, "Tier \"%s\" is unknown! Supported tiers: main, high\n", ctx->tier);
807 return AVERROR(EINVAL);
814 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
816 switch (avctx->codec->id) {
817 case AV_CODEC_ID_H264:
818 return nvenc_setup_h264_config(avctx);
819 case AV_CODEC_ID_HEVC:
820 return nvenc_setup_hevc_config(avctx);
821 /* Earlier switch/case will return if unknown codec is passed. */
827 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
829 NvencContext *ctx = avctx->priv_data;
830 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
831 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
833 NV_ENC_PRESET_CONFIG preset_config = { 0 };
834 NVENCSTATUS nv_status = NV_ENC_SUCCESS;
835 AVCPBProperties *cpb_props;
840 ctx->last_dts = AV_NOPTS_VALUE;
842 ctx->encode_config.version = NV_ENC_CONFIG_VER;
843 ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
845 ctx->init_encode_params.encodeHeight = avctx->height;
846 ctx->init_encode_params.encodeWidth = avctx->width;
848 ctx->init_encode_params.encodeConfig = &ctx->encode_config;
850 nvenc_map_preset(ctx);
852 if (ctx->flags & NVENC_ONE_PASS)
854 if (ctx->flags & NVENC_TWO_PASSES)
857 if (ctx->twopass < 0) {
858 ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
861 preset_config.version = NV_ENC_PRESET_CONFIG_VER;
862 preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
864 nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
865 ctx->init_encode_params.encodeGUID,
866 ctx->init_encode_params.presetGUID,
868 if (nv_status != NV_ENC_SUCCESS)
869 return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
871 memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
873 ctx->encode_config.version = NV_ENC_CONFIG_VER;
875 if (avctx->sample_aspect_ratio.num && avctx->sample_aspect_ratio.den &&
876 (avctx->sample_aspect_ratio.num != 1 || avctx->sample_aspect_ratio.num != 1)) {
878 avctx->width * avctx->sample_aspect_ratio.num,
879 avctx->height * avctx->sample_aspect_ratio.den,
881 ctx->init_encode_params.darHeight = dh;
882 ctx->init_encode_params.darWidth = dw;
884 ctx->init_encode_params.darHeight = avctx->height;
885 ctx->init_encode_params.darWidth = avctx->width;
888 // De-compensate for hardware, dubiously, trying to compensate for
889 // playback at 704 pixel width.
890 if (avctx->width == 720 &&
891 (avctx->height == 480 || avctx->height == 576)) {
893 ctx->init_encode_params.darWidth * 44,
894 ctx->init_encode_params.darHeight * 45,
896 ctx->init_encode_params.darHeight = dh;
897 ctx->init_encode_params.darWidth = dw;
900 ctx->init_encode_params.frameRateNum = avctx->time_base.den;
901 ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
903 num_mbs = ((avctx->width + 15) >> 4) * ((avctx->height + 15) >> 4);
904 ctx->max_surface_count = (num_mbs >= 8160) ? 32 : 48;
906 if (ctx->buffer_delay >= ctx->max_surface_count)
907 ctx->buffer_delay = ctx->max_surface_count - 1;
909 ctx->init_encode_params.enableEncodeAsync = 0;
910 ctx->init_encode_params.enablePTD = 1;
912 if (avctx->refs >= 0) {
913 /* 0 means "let the hardware decide" */
914 switch (avctx->codec->id) {
915 case AV_CODEC_ID_H264:
916 ctx->encode_config.encodeCodecConfig.h264Config.maxNumRefFrames = avctx->refs;
918 case AV_CODEC_ID_H265:
919 ctx->encode_config.encodeCodecConfig.hevcConfig.maxNumRefFramesInDPB = avctx->refs;
921 /* Earlier switch/case will return if unknown codec is passed. */
925 if (avctx->gop_size > 0) {
926 if (avctx->max_b_frames >= 0) {
927 /* 0 is intra-only, 1 is I/P only, 2 is one B Frame, 3 two B frames, and so on. */
928 ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
931 ctx->encode_config.gopLength = avctx->gop_size;
932 switch (avctx->codec->id) {
933 case AV_CODEC_ID_H264:
934 ctx->encode_config.encodeCodecConfig.h264Config.idrPeriod = avctx->gop_size;
936 case AV_CODEC_ID_H265:
937 ctx->encode_config.encodeCodecConfig.hevcConfig.idrPeriod = avctx->gop_size;
939 /* Earlier switch/case will return if unknown codec is passed. */
941 } else if (avctx->gop_size == 0) {
942 ctx->encode_config.frameIntervalP = 0;
943 ctx->encode_config.gopLength = 1;
944 switch (avctx->codec->id) {
945 case AV_CODEC_ID_H264:
946 ctx->encode_config.encodeCodecConfig.h264Config.idrPeriod = 1;
948 case AV_CODEC_ID_H265:
949 ctx->encode_config.encodeCodecConfig.hevcConfig.idrPeriod = 1;
951 /* Earlier switch/case will return if unknown codec is passed. */
955 /* when there're b frames, set dts offset */
956 if (ctx->encode_config.frameIntervalP >= 2)
959 nvenc_setup_rate_control(avctx);
961 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
962 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
964 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
967 res = nvenc_setup_codec_config(avctx);
971 nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
972 if (nv_status != NV_ENC_SUCCESS) {
973 return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
976 if (ctx->encode_config.frameIntervalP > 1)
977 avctx->has_b_frames = 2;
979 if (ctx->encode_config.rcParams.averageBitRate > 0)
980 avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
982 cpb_props = ff_add_cpb_side_data(avctx);
984 return AVERROR(ENOMEM);
985 cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
986 cpb_props->avg_bitrate = avctx->bit_rate;
987 cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
992 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
994 NvencContext *ctx = avctx->priv_data;
995 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
996 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
998 NVENCSTATUS nv_status;
999 NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1000 allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1002 switch (ctx->data_pix_fmt) {
1003 case AV_PIX_FMT_YUV420P:
1004 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YV12_PL;
1007 case AV_PIX_FMT_NV12:
1008 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_NV12_PL;
1011 case AV_PIX_FMT_YUV444P:
1012 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YUV444_PL;
1016 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format\n");
1017 return AVERROR(EINVAL);
1020 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1021 ctx->surfaces[idx].in_ref = av_frame_alloc();
1022 if (!ctx->surfaces[idx].in_ref)
1023 return AVERROR(ENOMEM);
1025 NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1026 allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1027 allocSurf.width = (avctx->width + 31) & ~31;
1028 allocSurf.height = (avctx->height + 31) & ~31;
1029 allocSurf.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
1030 allocSurf.bufferFmt = ctx->surfaces[idx].format;
1032 nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1033 if (nv_status != NV_ENC_SUCCESS) {
1034 return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1037 ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1038 ctx->surfaces[idx].width = allocSurf.width;
1039 ctx->surfaces[idx].height = allocSurf.height;
1042 ctx->surfaces[idx].lockCount = 0;
1044 /* 1MB is large enough to hold most output frames. NVENC increases this automaticaly if it's not enough. */
1045 allocOut.size = 1024 * 1024;
1047 allocOut.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
1049 nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1050 if (nv_status != NV_ENC_SUCCESS) {
1051 int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1052 if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
1053 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1054 av_frame_free(&ctx->surfaces[idx].in_ref);
1058 ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1059 ctx->surfaces[idx].size = allocOut.size;
1064 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx, int* surfaceCount)
1067 NvencContext *ctx = avctx->priv_data;
1069 ctx->surfaces = av_malloc(ctx->max_surface_count * sizeof(*ctx->surfaces));
1071 if (!ctx->surfaces) {
1072 return AVERROR(ENOMEM);
1075 ctx->timestamp_list = av_fifo_alloc(ctx->max_surface_count * sizeof(int64_t));
1076 if (!ctx->timestamp_list)
1077 return AVERROR(ENOMEM);
1078 ctx->output_surface_queue = av_fifo_alloc(ctx->max_surface_count * sizeof(NvencSurface*));
1079 if (!ctx->output_surface_queue)
1080 return AVERROR(ENOMEM);
1081 ctx->output_surface_ready_queue = av_fifo_alloc(ctx->max_surface_count * sizeof(NvencSurface*));
1082 if (!ctx->output_surface_ready_queue)
1083 return AVERROR(ENOMEM);
1085 for (*surfaceCount = 0; *surfaceCount < ctx->max_surface_count; ++*surfaceCount) {
1086 res = nvenc_alloc_surface(avctx, *surfaceCount);
1094 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1096 NvencContext *ctx = avctx->priv_data;
1097 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1098 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1100 NVENCSTATUS nv_status;
1101 uint32_t outSize = 0;
1102 char tmpHeader[256];
1103 NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1104 payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1106 payload.spsppsBuffer = tmpHeader;
1107 payload.inBufferSize = sizeof(tmpHeader);
1108 payload.outSPSPPSPayloadSize = &outSize;
1110 nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1111 if (nv_status != NV_ENC_SUCCESS) {
1112 return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1115 avctx->extradata_size = outSize;
1116 avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1118 if (!avctx->extradata) {
1119 return AVERROR(ENOMEM);
1122 memcpy(avctx->extradata, tmpHeader, outSize);
1127 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1129 NvencContext *ctx = avctx->priv_data;
1130 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1131 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1135 int surfaceCount = 0;
1137 if (!nvenc_dyload_nvenc(avctx))
1138 return AVERROR_EXTERNAL;
1140 res = nvenc_setup_device(avctx);
1144 res = nvenc_open_session(avctx);
1148 res = nvenc_setup_encoder(avctx);
1152 res = nvenc_setup_surfaces(avctx, &surfaceCount);
1156 if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1157 res = nvenc_setup_extradata(avctx);
1165 av_fifo_freep(&ctx->timestamp_list);
1166 av_fifo_freep(&ctx->output_surface_ready_queue);
1167 av_fifo_freep(&ctx->output_surface_queue);
1169 for (i = 0; i < surfaceCount; ++i) {
1170 if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
1171 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1172 av_frame_free(&ctx->surfaces[i].in_ref);
1173 p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1175 av_freep(&ctx->surfaces);
1178 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1179 ctx->nvencoder = NULL;
1181 if (ctx->cu_context_internal)
1182 dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
1183 ctx->cu_context = ctx->cu_context_internal = NULL;
1185 nvenc_unload_nvenc(avctx);
1190 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1192 NvencContext *ctx = avctx->priv_data;
1193 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1194 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1197 av_fifo_freep(&ctx->timestamp_list);
1198 av_fifo_freep(&ctx->output_surface_ready_queue);
1199 av_fifo_freep(&ctx->output_surface_queue);
1201 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1202 for (i = 0; i < ctx->max_surface_count; ++i) {
1203 if (ctx->surfaces[i].input_surface) {
1204 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->surfaces[i].in_map.mappedResource);
1207 for (i = 0; i < ctx->nb_registered_frames; i++) {
1208 if (ctx->registered_frames[i].regptr)
1209 p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1211 ctx->nb_registered_frames = 0;
1214 for (i = 0; i < ctx->max_surface_count; ++i) {
1215 if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
1216 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1217 av_frame_free(&ctx->surfaces[i].in_ref);
1218 p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1220 av_freep(&ctx->surfaces);
1221 ctx->max_surface_count = 0;
1223 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1224 ctx->nvencoder = NULL;
1226 if (ctx->cu_context_internal)
1227 dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
1228 ctx->cu_context = ctx->cu_context_internal = NULL;
1230 nvenc_unload_nvenc(avctx);
1235 static NvencSurface *get_free_frame(NvencContext *ctx)
1239 for (i = 0; i < ctx->max_surface_count; ++i) {
1240 if (!ctx->surfaces[i].lockCount) {
1241 ctx->surfaces[i].lockCount = 1;
1242 return &ctx->surfaces[i];
1249 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *inSurf,
1250 NV_ENC_LOCK_INPUT_BUFFER *lockBufferParams, const AVFrame *frame)
1252 uint8_t *buf = lockBufferParams->bufferDataPtr;
1253 int off = inSurf->height * lockBufferParams->pitch;
1255 if (frame->format == AV_PIX_FMT_YUV420P) {
1256 av_image_copy_plane(buf, lockBufferParams->pitch,
1257 frame->data[0], frame->linesize[0],
1258 avctx->width, avctx->height);
1262 av_image_copy_plane(buf, lockBufferParams->pitch >> 1,
1263 frame->data[2], frame->linesize[2],
1264 avctx->width >> 1, avctx->height >> 1);
1268 av_image_copy_plane(buf, lockBufferParams->pitch >> 1,
1269 frame->data[1], frame->linesize[1],
1270 avctx->width >> 1, avctx->height >> 1);
1271 } else if (frame->format == AV_PIX_FMT_NV12) {
1272 av_image_copy_plane(buf, lockBufferParams->pitch,
1273 frame->data[0], frame->linesize[0],
1274 avctx->width, avctx->height);
1278 av_image_copy_plane(buf, lockBufferParams->pitch,
1279 frame->data[1], frame->linesize[1],
1280 avctx->width, avctx->height >> 1);
1281 } else if (frame->format == AV_PIX_FMT_YUV444P) {
1282 av_image_copy_plane(buf, lockBufferParams->pitch,
1283 frame->data[0], frame->linesize[0],
1284 avctx->width, avctx->height);
1288 av_image_copy_plane(buf, lockBufferParams->pitch,
1289 frame->data[1], frame->linesize[1],
1290 avctx->width, avctx->height);
1294 av_image_copy_plane(buf, lockBufferParams->pitch,
1295 frame->data[2], frame->linesize[2],
1296 avctx->width, avctx->height);
1298 av_log(avctx, AV_LOG_FATAL, "Invalid pixel format!\n");
1299 return AVERROR(EINVAL);
1305 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1307 NvencContext *ctx = avctx->priv_data;
1308 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1309 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1313 if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1314 for (i = 0; i < ctx->nb_registered_frames; i++) {
1315 if (!ctx->registered_frames[i].mapped) {
1316 if (ctx->registered_frames[i].regptr) {
1317 p_nvenc->nvEncUnregisterResource(ctx->nvencoder,
1318 ctx->registered_frames[i].regptr);
1319 ctx->registered_frames[i].regptr = NULL;
1325 return ctx->nb_registered_frames++;
1328 av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1329 return AVERROR(ENOMEM);
1332 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1334 NvencContext *ctx = avctx->priv_data;
1335 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1336 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1338 AVHWFramesContext *frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1339 NV_ENC_REGISTER_RESOURCE reg;
1342 for (i = 0; i < ctx->nb_registered_frames; i++) {
1343 if (ctx->registered_frames[i].ptr == (CUdeviceptr)frame->data[0])
1347 idx = nvenc_find_free_reg_resource(avctx);
1351 reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1352 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1353 reg.width = frames_ctx->width;
1354 reg.height = frames_ctx->height;
1355 reg.bufferFormat = ctx->surfaces[0].format;
1356 reg.pitch = frame->linesize[0];
1357 reg.resourceToRegister = frame->data[0];
1359 ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, ®);
1360 if (ret != NV_ENC_SUCCESS) {
1361 nvenc_print_error(avctx, ret, "Error registering an input resource");
1362 return AVERROR_UNKNOWN;
1365 ctx->registered_frames[idx].ptr = (CUdeviceptr)frame->data[0];
1366 ctx->registered_frames[idx].regptr = reg.registeredResource;
1370 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1371 NvencSurface *nvenc_frame)
1373 NvencContext *ctx = avctx->priv_data;
1374 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1375 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1378 NVENCSTATUS nv_status;
1380 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1381 int reg_idx = nvenc_register_frame(avctx, frame);
1383 av_log(avctx, AV_LOG_ERROR, "Could not register an input CUDA frame\n");
1387 res = av_frame_ref(nvenc_frame->in_ref, frame);
1391 nvenc_frame->in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1392 nvenc_frame->in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1393 nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &nvenc_frame->in_map);
1394 if (nv_status != NV_ENC_SUCCESS) {
1395 av_frame_unref(nvenc_frame->in_ref);
1396 return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1399 ctx->registered_frames[reg_idx].mapped = 1;
1400 nvenc_frame->reg_idx = reg_idx;
1401 nvenc_frame->input_surface = nvenc_frame->in_map.mappedResource;
1404 NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1406 lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1407 lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1409 nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1410 if (nv_status != NV_ENC_SUCCESS) {
1411 return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1414 res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1416 nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1417 if (nv_status != NV_ENC_SUCCESS) {
1418 return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1425 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1426 NV_ENC_PIC_PARAMS *params)
1428 NvencContext *ctx = avctx->priv_data;
1430 switch (avctx->codec->id) {
1431 case AV_CODEC_ID_H264:
1432 params->codecPicParams.h264PicParams.sliceMode = ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1433 params->codecPicParams.h264PicParams.sliceModeData = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1435 case AV_CODEC_ID_H265:
1436 params->codecPicParams.hevcPicParams.sliceMode = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1437 params->codecPicParams.hevcPicParams.sliceModeData = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1442 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
1444 NvencContext *ctx = avctx->priv_data;
1445 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1446 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1448 uint32_t slice_mode_data;
1449 uint32_t *slice_offsets;
1450 NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1451 NVENCSTATUS nv_status;
1454 enum AVPictureType pict_type;
1456 switch (avctx->codec->id) {
1457 case AV_CODEC_ID_H264:
1458 slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1460 case AV_CODEC_ID_H265:
1461 slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1464 av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1465 res = AVERROR(EINVAL);
1468 slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1471 return AVERROR(ENOMEM);
1473 lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1475 lock_params.doNotWait = 0;
1476 lock_params.outputBitstream = tmpoutsurf->output_surface;
1477 lock_params.sliceOffsets = slice_offsets;
1479 nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1480 if (nv_status != NV_ENC_SUCCESS) {
1481 res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1485 if (res = ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes,0)) {
1486 p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1490 memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1492 nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1493 if (nv_status != NV_ENC_SUCCESS)
1494 nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1497 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1498 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, tmpoutsurf->in_map.mappedResource);
1499 av_frame_unref(tmpoutsurf->in_ref);
1500 ctx->registered_frames[tmpoutsurf->reg_idx].mapped = 0;
1502 tmpoutsurf->input_surface = NULL;
1505 switch (lock_params.pictureType) {
1506 case NV_ENC_PIC_TYPE_IDR:
1507 pkt->flags |= AV_PKT_FLAG_KEY;
1508 case NV_ENC_PIC_TYPE_I:
1509 pict_type = AV_PICTURE_TYPE_I;
1511 case NV_ENC_PIC_TYPE_P:
1512 pict_type = AV_PICTURE_TYPE_P;
1514 case NV_ENC_PIC_TYPE_B:
1515 pict_type = AV_PICTURE_TYPE_B;
1517 case NV_ENC_PIC_TYPE_BI:
1518 pict_type = AV_PICTURE_TYPE_BI;
1521 av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1522 av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1523 res = AVERROR_EXTERNAL;
1527 #if FF_API_CODED_FRAME
1528 FF_DISABLE_DEPRECATION_WARNINGS
1529 avctx->coded_frame->pict_type = pict_type;
1530 FF_ENABLE_DEPRECATION_WARNINGS
1533 ff_side_data_set_encoder_stats(pkt,
1534 (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1536 pkt->pts = lock_params.outputTimeStamp;
1537 pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
1539 /* when there're b frame(s), set dts offset */
1540 if (ctx->encode_config.frameIntervalP >= 2)
1543 if (pkt->dts > pkt->pts)
1544 pkt->dts = pkt->pts;
1546 if (ctx->last_dts != AV_NOPTS_VALUE && pkt->dts <= ctx->last_dts)
1547 pkt->dts = ctx->last_dts + 1;
1549 ctx->last_dts = pkt->dts;
1551 av_free(slice_offsets);
1557 av_free(slice_offsets);
1558 timestamp_queue_dequeue(ctx->timestamp_list);
1563 static int output_ready(NvencContext *ctx, int flush)
1565 int nb_ready, nb_pending;
1567 nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1568 nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1569 return nb_ready > 0 && (flush || nb_ready + nb_pending >= ctx->buffer_delay);
1572 int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt,
1573 const AVFrame *frame, int *got_packet)
1575 NVENCSTATUS nv_status;
1576 NvencSurface *tmpoutsurf, *inSurf;
1579 NvencContext *ctx = avctx->priv_data;
1580 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1581 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1583 NV_ENC_PIC_PARAMS pic_params = { 0 };
1584 pic_params.version = NV_ENC_PIC_PARAMS_VER;
1587 inSurf = get_free_frame(ctx);
1590 res = nvenc_upload_frame(avctx, frame, inSurf);
1592 inSurf->lockCount = 0;
1596 pic_params.inputBuffer = inSurf->input_surface;
1597 pic_params.bufferFmt = inSurf->format;
1598 pic_params.inputWidth = avctx->width;
1599 pic_params.inputHeight = avctx->height;
1600 pic_params.outputBitstream = inSurf->output_surface;
1601 pic_params.completionEvent = 0;
1603 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1604 if (frame->top_field_first) {
1605 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
1607 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
1610 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
1613 pic_params.encodePicFlags = 0;
1614 pic_params.inputTimeStamp = frame->pts;
1615 pic_params.inputDuration = 0;
1617 nvenc_codec_specific_pic_params(avctx, &pic_params);
1619 timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
1621 pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
1624 nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
1626 if (frame && nv_status == NV_ENC_ERR_NEED_MORE_INPUT)
1627 av_fifo_generic_write(ctx->output_surface_queue, &inSurf, sizeof(inSurf), NULL);
1629 if (nv_status != NV_ENC_SUCCESS && nv_status != NV_ENC_ERR_NEED_MORE_INPUT) {
1630 return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
1633 if (nv_status != NV_ENC_ERR_NEED_MORE_INPUT) {
1634 while (av_fifo_size(ctx->output_surface_queue) > 0) {
1635 av_fifo_generic_read(ctx->output_surface_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1636 av_fifo_generic_write(ctx->output_surface_ready_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1640 av_fifo_generic_write(ctx->output_surface_ready_queue, &inSurf, sizeof(inSurf), NULL);
1643 if (output_ready(ctx, !frame)) {
1644 av_fifo_generic_read(ctx->output_surface_ready_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1646 res = process_output_surface(avctx, pkt, tmpoutsurf);
1651 av_assert0(tmpoutsurf->lockCount);
1652 tmpoutsurf->lockCount--;